• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    Switched capacitance feedback control circuit and sigma delta modulator, using same, for digitally encoding an analog input signal. The control circuit includes input means (IM3) able to sample and algebraically add an analog input signal [x(t)[ and an analog feedback signal (b), means (IM4) to integrate these added signals and to provide an analog output signal [w(t)], an analog-to-digital converter (ADC) providing a digital output signal (z) in response to the analog output signal, and a one-bit digital-to-analog converter (DAC) providing said feedback signal (b) in response to the output signal (z).
    公开号:SU1438635A3
    申请号:SU853867698
    申请日:1985-03-15
    公开日:1988-11-15
    发明作者:Херман Лутгардис Корнелиус Рабае Дирк
    申请人:Интернэшнл Стандарт Электрик Корпорейшн (Фирма)；
    IPC主号:
    专利说明:

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    It retains aatomnKb and computing technology and can be used for personal photo) | YaLLOG080GO signal.
    The goal is to improve the accuracy of the modulator.
    FIG. 1 shows the functional arrangement of the LSTs; ia fng.2 - timing charts of the generator signal for bluff1 & n pulses.
    Si1 ma-delta Cholul "torus contains a generator of 1 of all common impulses, blocks 2 and 3 kV, and complete, and it graters 4
    and 5, Anllo-1Flv transducer 5 nall n binary binary signal, () 7 Sh1figal converter, which is equal to I or O in the dependency artel (11AL) 7, input 8 and output 9.
    whether the value of the ray when sampling the signal is larger than the corresponding one is less than 0.
    Block 2 is a quantum domain. includes the provision of an uncombing PI element 10, a co-sysler D type and the keys It is t4. Similarly, block 3 quanto anil contains a match 11-1 element 15 and keys 16-19 Integrator L includes an operational amplifier 20n capacitor 2t, Integrator 5 turns on an OperlSyuk Call 22 and consultant 23.
    ADC 6 contains block 24
    and msmeity HE-; LT I 25 and 26.
    ZDL 7 includes keys 27, 23 and 29, elements NOT 30 and 31, sources 32 and 33 of positive and negative voltages.
    The modulator is controlled from the nuMx-iT t cn "chronitirugs1 x 11POL11.C011 OiS, o IP. 0.N and P2G, f. Lrmi pvt MMx rftKop.iTopoM 1 l npi;: ciaiu: o "- pmh nl (tnir.J.OIH and 01Р, while
    02S "02P YAIL") OTGYA LOPOLNOMIIMIpulslmi l 01N and 01 made nspera kryplyu "n 1mnsch relative to pulses 02JJ, 02P. The cool I1 of these pulses has a frequency of 1 MHz, which corresponds to the sampling period T, an equal to 1 x at t-synchronizing pulses P1, V, P2, 72 have a duration equal to / 3/8 / хТ.
    For a period of time equal to the duration of the cool P2 pulses from the 02N series to the P2 and 02 series of the 02g.gl generated at the output of the integrator 5, is sampled and stored in the block 2A of the day.
    During the period, the duration of each K4 of each of their siichroiiru - ichs of P1 from series O IN and 1 of series 01P, block 2 & compares the saved input;
    Schd shshsh sh shashshshshsh shshashsh: .m
    signal eiborkn and O (ground potential).
    At the output of the flea 24, the comparison in the irregularity is the actual signal obtained from a sample smaller or greater than 0. This binary output signal is then fed to the HE-IUttl 26 element and the flow of time is equal to the synchronous duration - pulse P2, passes to the exit A1Sh 6.
    Lip 6 transforms the instantaneous value of an analog signal to a binary binary signal, which is equal to I or O in Dependence
    whether the value of the ray when sampling the signal is larger than the corresponding one is less than 0.
    Si1 1a-delta-molol tor works as follows.
    The input signal U (t) is fed to the input G. during the time pT, it has a constant value U (nT) for the entire duration of the sampling period T (Fig. 2). In this case, the signals x (c) and W (t) Haj ' btxoAax of integrators h and 3 iect, respectively, the values of (nT) and W (nT).
    During the periods of time, early P1 for 1 ms 01H and 14 for a pulse Dip, keys 11 and J2 are open, capacitor C1 is charged with neiyiy U (nT) and jL Knert 8 circuits, the controller has added a message about the same as i 3j; t: MOHT 10 and key 12.
    Lnalogich and around, since the keys 1b and 17 are open, it is output; the sigilll x (pt) and the co-sts sz health between x (pt) and ground in the engine, consisting of successively connected key 16, matching element 15 and key 17 .
    Block 24 Sraanenip Worker Tlkim
    In such a way, that a certain wellness, an example W (n7), which was previously obtained as a result of a sample, is converted to a binary value Z, forming an output of the output element NOT-26. Since the key 27 is zlpert, this value ii is applied to the AC11 7, at the output of which the value of the feedback signal is then generated or b - V, depending on whether Z is equal to 1 or 0. When Z-1, key 29 is open, while key 28 is in open state ni in the current case when 7.-0.
    3143: 46
    ft flow “cjienyiomej o prozhumutkl timenn, rnnigo pulse duration G2 and series 021 it 12 ich series 021, keys 13 and 14 open and, slantonrk-“ Oh, the signal obrltnpvy sv-m, patiHiJA V and.mi -V It is fed through the capacitor C1, which is perll by this to the value, by means of UCnl), to the nV input of the input of the integrated operating | Q on 20. By the moment (signal x (t) or x, X next. YU1C4th value: xC () (nT) (Ct / C2) U (nT) - {Ct / C21b; analogous processing, since the keys jc 18 and J9 are open, the feedback signal is fed through the NW condenser, which was previously the scourge of T. - hsni x (aT) nl cknsrtkruzhi
    INTSGRIROWG 1 GO OTK i) GO EFFORTS- 20
    tsl 2. At the moment of s4. Mi Hii (riit-ill V (t) nl Bwxo. U W ime 1a: goma next ii), i4f4fHf: W (; +1) T-Viu T) (€ J / C OxfnT - 3 / C.) B.
    Hi skl1ln 101CH1.:;::;. r, chg - l 25
    KnaHTl4l.11UIIJ with P KG.CHM7CH., X.IK and
    Bloch J cnnto1.gcn; S iit-, rlbotl) T n cl “H; b. (; g-pt; uw :::: 1 r.i im im p grltor l;. lhdsdpiogo sagia.;, .Гi), x (t) and i) tv1 - i t: criTHj) v -4fro iiMTe-sj. grglish with;: gml. 7.1 reverse ok iMt, 4 ui b. In addition, i) curtia / i.i oTip,) MY CHN JH L tt JVSH SUMMYRO. U Я1
    tgrnvdii nxo; j ti4 o;: 11gill. ((t), x {t1j and eip1L-, 1 .rri (iit media (It 1,: rii); M. I H, rH h, -f f. " ilMVi-ptb.) i; iv- IJ.
    35
    , (a "Ktti Ti M-iix-Tii rlOstnom:; y ;; i-torz osSes I Ch g, T; l l with that,
    blocks 2 and 3 JLT
    from parasnt mx sixth m4, nocxosTt.xy iotenanll, under which the л lolit lop “plate onp“ -) 1sltroe C1, sz is switched to 1 tlm than one minimum of the potential of the diploma than nl 11 ti ni ni gi ni ni ni ni ni ni ni ni ni ni ni pt. Operational Washer 20 and 22.
    The signal P (r} and the SIGNAL of the inverse cpn-: and "b amplification of l1-g% and lg red 2 kp ntopl-i; | n integraltygo" g rnnakom ko- ({and 11 and ntom yyil "n, parallel to CJ / C2, where yT U p; u-HHi is okjnya scj-HUM and for “x (t), which in block h are kiltl ort and intgrtortor 5, it is implemented with one) 1m and Ti M also k); 1) fish (gain , ra - nmi SZ / S4.: 1l “rlbota A1Sh6 and DAC7 Mcnonhiyetc pelyostiyo time interval, rish and isorillu PJ, so that
    | Q jc
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    25
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    five
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    HMXiviHofi ssln L transform the 7 okachyvartp is good: tl or nrn1l before it can be used for the next person and hrcHtHHP2P2 on unit 2 and 3 kilo mounts. Etl gitulich turns out to be true for A15 pulses in the retransmission of a sample of signals U (l) n x (t).
    Formula and h - & é
    权利要求:
    Claims (3)
    [1]
    1. Sigm-leltl-modulator containing a nepDbo t block to the aitopani, nnfor MauHOHHti i whose input is a rational input, and the output is connected to tfXiijty tiep 4 f) i (TCj rptprl, ntol KOTopoi o panel) It is accurate to informionnomu nkhodu itsmnmch) Olokl Kilntorlii, to “adyu RS: h schp-dinon with rokho second u11T4 Grltorl, which is P (for and -formalon Rhod anal-lgi -IfroRogo urobrllltslr: i;.;.;); . which ;: nile sts oi modulator., gonerdtsr zldaaiykh HMityjsi.co;, .3 "and the second inputs of the co-ivro 1llch :: x; tsll ssotvitstspsio to fiL pHi-T and the second T.TKTonbLM perhojII. IV. And iTOpi-f: f JUlKOn KR; H T ONLNIP
    and llllogo-C Fr.): p1-oG | rl yurltel, about tl ii ii h y u U n and that,
    g aim l 0 C irHKrt ACCURACY MOLUCHCHTORL, n Merit nsh cm, and the irod.igoni pressorlchglts. and ,,. Korv-pt-ro is connected to 1 ppl of 1 ppl and 2 pp., H mmptoalin, norther pichol ln g, 13-oh and fi r p oSfL1ovltlsl 1: olkl) pgch1 to the federal line, it has a set of fireplaces, and it is at a glance, and it will have a real fireplaces. The program is so thin as the hall of the infrolarg g: rc ororl and l and the exo; “j long-digit-digital and digital-logged; prsobrleonltelsy podklmzchsgny sootvetstpg-ino to nrpnoxv and Taron pyhodlm generltorl ylal-aux pulses trstiP pghsd X which is connected to third tahtolym p.chollh IRDP and second blokon kplntomlhil n lnllogo- digital preoSf.sh nltgl, chotvortglT vkghod gengrltorl zlddkch their lodklyuch "n pulses to Internals perllogo and the second block of quanta, the next block of the pentlorni spd4 ryzh keys, soglaskulyl zlomsynt and Inu zero flow, and 1l, the information input of the first key is the inf1rnahon-icon input of the octlct, and the rsl, and the information input of the first key is infocl. wound you entrances of leg and second
    (are combined respectively I are the first and the second clock (M block's codes, the first to the second controllers of the third on the fourth orth keys are combined respectively): are the third and the fourth sockets of the unit, the fourth key output the output of the block, and the information input of the third key is a control input, and the output is combined with the output of the first key and connected to the input of a composite element, the output of which is cosrsi-nen with the information input of the fourth key of the second key, output which podkl1K | e n to the tire of zero potential.
    [2]
    2. A sigma-delta modulator according to claim 1, characterized in that the analog-to-digital converter contains a block of comparisons of IE-OR elements, the first and second outputs of the comparator block are connected to the inputs of the first third, respectively, of the non-NPI elements, the second in the middle of the second:) the HE-HJIil and psprlL tapes and the second input of Alok srapenken obsleely are the third clock input of the transform-el, the third
    one

    Of /
    nt
    (fHt) j 0k / l
    quarters and
    The TYL inputs of the comparison unit are: perm and fiToptM, respectively, and information inputs of the converter, the outputs of the first and second elements of the NON-PIT are the first and second outputs of the converter, respectively.
    [3]
    3. The Sigmadelta modulator according to claim 1, 1, differs in that the digital-analog converter contains sources of positive and negative voltage, elements NOT and keys, the output of the first key is connected to the input of the first element KE, the output of which is connected directly to the first control inputs the second and third keys and, through the second element, NOT from the second controlling the inputs of the second and third keys, which define the inputs of which are connected respectively to the sources of negative and positive voltage, the second and third The secondary switches are connected to the converter, the first and second controls and the information inputs of the first switch are respectively the second and the second information inputs of the converter.
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    JPS5625827A|1979-08-10|1981-03-12|Nec Corp|Coding unit|
    JPS6217899B2|1980-01-09|1987-04-20|Nippon Electric Co|
    US4439756A|1982-01-20|1984-03-27|International Telephone And Telegraph Corporation|Delta-Sigma modulator with switch capacitor implementation|
    US4504803A|1982-06-28|1985-03-12|Gte Lenkurt, Incorporated|Switched capacitor AM modulator/demodulator|US4837527A|1987-12-23|1989-06-06|Rca Licensing Corporation|Switched capacitor arrangement|
    US4777472A|1987-12-23|1988-10-11|Rca Licensing Corporation|Modified cascode amplifier|
    US4857928A|1988-01-28|1989-08-15|Motorola, Inc.|Method and arrangement for a sigma delta converter for bandpass signals|
    JPH01233921A|1988-03-15|1989-09-19|Toshiba Corp|A/d conversion circuit using delta-sigma modulator|
    US4901077A|1988-04-18|1990-02-13|Thomson Consumer Electronics, Inc.|Sigma-delta modulator for D-to-A converter|
    US4876543A|1988-05-31|1989-10-24|Motorola, Inc.|Multi-rate cascaded noise shaping modulator|
    GB8818703D0|1988-08-05|1988-09-07|Gen Electric Co Plc|Delta sigma modulator arrangements|
    US5030952A|1990-12-26|1991-07-09|Motorola, Inc.|Sigma-delta type analog to digital converter with trimmed output and feedback|
    KR0155622B1|1995-05-02|1998-12-15|문정환|Delta-sigma a/d converter|
    US5703589A|1996-03-08|1997-12-30|Burr-Brown Corporation|Switched capacitor input sampling circuit and method for delta sigma modulator|
    US6008685A|1998-03-25|1999-12-28|Mosaic Design Labs, Inc.|Solid state temperature measurement|
    DE60124318T2|2000-07-07|2007-05-24|Koninklijke Philips Electronics N.V.|SIGMA-DELTA MODULATOR WITH ADJUSTABLE FEEDBACK FACTOR|
    WO2011117231A1|2010-03-26|2011-09-29|Solvay Sa|Method of treating waste gases|
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    BE2/60364A|BE899174A|1984-03-16|1984-03-16|FEEDBACK CONTROL CHAIN AND SWITCHED SWITCHES AND SIGMA-DELTA MODULATOR IN WHICH IT IS APPLIED.|
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