• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    llllïiN / 22 / FEB / 2010 l0I48 Hansson Thyresson 0046 40 30774013 SAM SANDRAG Power amplifier for amplifying an electrical input signal in a frequency operating range and providing an output signal, comprising switching means (12) for generating a square signal by switching to a square input signal. a first voltage supply and a second voltage supply, input signal means for receiving the electrical signal and displacing the switching means, the input signal means comprising an integrator circuit (10) integrating an error signal formed by a difference between the output signal and the electrical input signal and providing an integrator amplifier. The power amplifier also comprises a local feedback circuit (18) and an external feedback circuit (20), where an output of the integrator circuit is connected to the input of the switching means. A limiting circuit (22) is provided for receiving the electricity. the input signal and an output signal of the integrator circuit and is connected to the integrator circuit to limit the gain of the integrator circuit when a difference detected between the electrical input signal and the output signal from the integrator circuit exceeds a predetermined value. AH 042823900 Da aenoc 10-02-22 ver. 3 ^ FAX Nr. 10040 40 307740 S.
    公开号:SE0950295A1
    申请号:SE0950295
    申请日:2009-04-30
    公开日:2010-10-31
    发明作者:Patrik Bostroem
    申请人:Patrik Bostroem；
    IPC主号:
    专利说明:

    2 The switching between to and from is done at a frequency that is usually around 400kHz or higher, which gives a sufficiently high resolution in the audio band. Typically, a Class D amplifier includes a second order low pass filter with a relatively high Q value for demodulating the PWM pulses. This filter shifts the phase asymptotically to -180 ° and the higher the Q value, the earlier it reaches -180 °. When the local filter is loaded, the Q value decreases.
    The actual pulse width modulation can be accomplished in various ways. The most obvious way is to use a reference signal, for example a triangular wave signal, and then compare the input signal or setting value with this reference signal. Each time these signals intersect, the output stage changes state. A disadvantage of this reference signal technology is that the average value of the pulse train corresponds to the set value only as long as the supply voltages are constant and the state change is infinitely fast.
    In addition, of course, the triangular wave must be ideal.
    The reference signal technology has no feedback at all, which means that there is a lack of control of the demodulation filter. There are in fact two signal paths, one from the input to the output and one from the supply to the output. The channel separation and supply voltage suppression becomes very poor. An individual advantage is that the switching frequency is constant.
    Forward-coupled supply can be used to reduce the dependence on the supply voltage.
    Using a digital device such as a DSP for calculating the pulse width instead of comparing the setting value with the triangular wave gives basically the same result. However, there are several possibilities to compensate for non-ideal features of components. A DSP solution is also more complicated and expensive.
    A very effective way to achieve pulse width modulation is through self-oscillation. A comparator is used to compare the average value of the pulse train with the setting value and if the error is negative, the positive switch is switched on and vice versa if it is positive. The operating frequency is close to the frequency where the feedback has -180 ° phase shift. Some solutions use the demodulation filter to provide the averaging AH p4282seOO ps sedoc 10-02-22 ver, 3 10 15 20 25 30 3 and this allows the amplifier to adjust errors that occur during and after the demodulation filter.
    Without additional circuits, the switching frequency would be equal to the resonant frequency of the filter, which is usually around 50kHz and this is not acceptable. A zero and zero negative pressure resistor is inserted into the sensing circuit to push up the frequency for about a decade. This zero increases the amplitude of the modulation signal and reduces the loop gain, thereby increasing the nonlinearities. The result of this post-filter self-oscillation topology is because the linear distortion (the distortion that does not add any new frequency content such as amplitude and phase) is very low to be a class D amplifier, but the non-linear distortion is worse. An early description of self-oscillating Class D amplifiers was made by Clayton Sturgeon of Texas, who filed a 1976 patent application with the number US 4,041,411.
    A later prior art document is WO3 / 090343, which discloses and describes a power amplifier for amplifying an electrical signal in a frequency operating range, comprising switching means for generating a square signal by alternately coupling the square signal to a first supply voltage and a second supply voltage. filter means for generating a power output signal by low-pass filtering of the square signal, input signal means for receiving the electrical signal and driving the switching means and a control circuit connected to the power signal output and the input signal means for controlling the power amplifier.
    Another possibility is to add a second-order active integrator that demodulates the pulse train and provides a very high loop gain at low frequencies. The switching frequency is thus completely controlled by this integrator and not at all by the Q value of the output filter. The function of this self-oscillating topology with prefilter is therefore very robust and simple, and it provides very low non-linear distortion, especially at low frequencies.
    In a self-oscillating topology with a pre-filter, however, the linear distortion becomes high, ie. the frequency response and the phase are completely load dependent and a desired response curve can only be achieved with specific load impedance. The switching frequency of all self-oscillating topologies varies with modulation depth AH p4282seOO ps sedoc 10-02-22 ver. 3 10 15 20 25 30 4 pet (pulse width). This is advantageous in terms of efficiency, as the switching losses become lower as the lead losses increase, but if another loop is added to increase the loop gain, there is a risk that this loop picks up the switching frequency, whereby the amplifier would end up in a destructive undertone oscillation mode.
    There is a need to increase the loop gain to reduce the non-linear and linear distortion of self-oscillating Class D amplifiers. This is usually done by including an integrator that integrates the difference between the output signal and the input signal, and thus creates an error signal, to further increase the loop gain in the audio band. At least one problem arises here. At start-up, before the class D stage is in operation, or when cutting the output signal, the integrator will be supplied with a large error signal, which will be integrated until the integrator becomes saturated, after which the fault will continue to charge an integrating capacitor. This causes the integrator to hang.
    Consequently, there is a need to eliminate this hanging behavior in order to be able to use an integrator in combination with a class D step.
    SUMMARY OF THE INVENTION In accordance with the invention, disadvantages and problems of prior art amplifiers are eliminated by providing a self-oscillating Class D amplifier with a power stage with a local feedback loop that provides local gain, and by providing an external feedback loop. gives an external reinforcement, whereby the local reinforcement is substantially equal to the external reinforcement. By maintaining the local gain equal to or substantially equal to the external gain, the result will be that the output signal from the integrator has the same amplitude as the input signal to the integrator plus an error signal.
    Furthermore, a limiting circuit has been provided for measuring the difference between input signal to and output signal from the integrator, and if this difference exceeds a predetermined threshold value, the limiting circuit is activated so that AH p4282seOO ps sedoc 10-02-22 ver. 3 10 15 20 25 30 5 greatly reduce the gain of the integrator and finally set the gain of the integrator close to one or the other. This means that when the class D stage can no longer follow the input signal, as during start and at cutting, the integrator will only have the gain one.
    BRIEF DESCRIPTION OF THE DRAWINGS In order to clarify how the above and other advantages and objects of the invention are achieved, a more specific description of the above invention will be made by reference to certain embodiments thereof, which are set forth in the accompanying drawings.
    It should be noted that these drawings only show typical embodiments of the invention and therefore should not be construed as limiting its scope. The invention is described and explained with further specification and details with reference to the accompanying drawings, in which: Fig. 1 is a schematic block diagram of a prior art class D amplifier, Fig. 2 is a schematic block diagram of a basic embodiment of an amplifier in according to the invention, Fig. 3 is a basic circuit diagram of an embodiment of a limiting circuit included in an embodiment of the invention, Fig. 4 is a general circuit diagram of an embodiment of an amplifier in accordance with the invention, Fig. 5 is a more detailed block diagram of the embodiment of Fig. 2, Fig. 6 is a block diagram of an inverting embodiment of an amplifier in accordance with the invention, Fig. 7 is a schematic circuit diagram of an inverting embodiment of an amplifier in accordance with the invention, and Figs. 8 is a schematic circuit diagram of an alternative embodiment of an amplifier in accordance with the invention.
    AH p4282se00 ps sedoc 10-02-22 ver. THE INVENTION In the prior art amplifier shown in Fig. 1, a non-inverting input of an integrator circuit 10 receives an electrical input signal. An output of the integrator circuit 10 is connected to a switching means 12.
    A power output from the switching means 10 is connected to a low-pass filter, comprising an inductance 14 and a capacitor 16. From the inductance 14 a local feedback loop 18 is connected to an inverting input of the switching means 13. A non-inverting input of the switching means 13 is connected to an output of the integrator circuit 10. An external feedback loop 20 connects the inductor 14 to an inverting second input of the integrator circuit 10. Under conditions of shear, the integrator will hang, leading to a high proportion of audible artifacts. A possible improvement would be to keep the supply voltage at a lower level to limit how much the integrator hangs, but this does not solve the problems during start-up or in current limiting situations.
    In the embodiment of an amplifier in accordance with the invention shown in Fig. 2 and Fig. 5, instead, a limiting circuit 22 is connected to measure the difference between the output signal from the integrator circuit and the electrical input signal. In the embodiment shown in Fig. 2, a non-inverting input of the limiting circuit is connected to the output of the integrator circuit, and an inverting input of the limiting circuit is connected to receive the electrical input signal. An output of the limiting circuit is connected to the inverting second input of the integrator circuit.
    The local feedback loop results in a local gain of 1 / K + 1 and the integrator circuit 10 also attempts to maintain an external gain of 1 / K + 1. As a result, the output signal from the integrator has the same amplitude as the input signal to the integrator plus an error signal. The limiting circuit measures the difference between the input and the output of the integrator and if this difference exceeds a predetermined threshold value, the limiting circuit is activated to set the gain of the integrator to near one. This means that when the class D stage cannot follow the input signal, for example at start-up and when mowing occurs, the integrator only has the gain one.
    AH p4282se0O ps sedoc 10-02-22 ver. In the embodiment of a limiting circuit shown in Fig. 3, a first resistor R1 and a second resistor R2 determine and can be used to adjust the magnitude of the difference accepted between the input and output of the integrator circuit 10. A first transistor Q1 begins to conduct and decreases the output signal, when the base-emitter voltage is approximately 600 mV. By selecting R1 and R2 with the resistance 1 kohm, the maximum permissible fault voltage will be 1.2V.
    A simulation model of a self-oscillating class D stage with after-filter and with an integrator at the input to increase the loop gain in the audio band is shown in Fig. 4. In particular, only the components that have technically significant properties are described below.
    A first switch S1 switches on at 0.001V and switches off at OV.
    A second switch S2 has inverse switch-on and switch-off values. The switches S1 and S2 are connected to a first voltage source 24 and a second voltage source 26, respectively. The voltage sources 24 and 26 provide the required or available voltage, which in the embodiment shown is 60V. S1 and S2 together form the switching means 12 based on a comparator and a power stage. A resistor R44 and a capacitor C19 roughly correspond to the running time of the comparator switching stage (which is actually there).
    The local gain in the class D stage is determined by resistor R10 and resistor R8 and is locked to be equal to the external gain, which is determined by resistor R43 and resistor R42. The output signal from the switching means 12 is passed through the inductor 14 and is received in a load RL.
    The amplifier circuit AR1 forms the integrator circuit 10, in which a capacitor C18 acts as a pole and a resistor R41 limits the DC gain. In the embodiment shown, AR1 has +/- 15V as the supply voltage. A capacitor C14 and a resistor R35 push the switching frequency away from the filter resonant frequency and up to a desired much higher frequency.
    The limiting circuit 22 is formed by a resistor R45, a resistor R46, a transistor Q1, a transistor Q2, a diode D3 and a diode D4. A voltage source UlN represents an electrical input signal. The entire output signal from integrator dryer- AH p4282seOO ps sedoc 10-02-22 ver. 3 10 15 20 25 30 8 the circuit 10 is received by the limiting circuit, which results in a required gain of 1.0 of the integrator circuit 10. If a part of the output signal from the integrator circuit 10 is led to the limiting circuit, the required amplification of the integrator circuit will increase in corresponding degree (see Fig. 8 and the description below). By setting R45 to 1kohm and R46 to 10kohm, the allowable error will be reduced to around 600mV. Resistors R42 and R43 form the outer loop 20.
    In the embodiment shown in Fig. 5, the local feedback loop 18 comprises a resistor RS and a resistor R4. The resulting gain is R3 / R4 + 1. Correspondingly, the outer feedback loop 20 comprises a resistor R5 and a resistor R6, which causes the external gain to be R6 / R5 + 1.
    The alternative embodiment shown in Fig. 6 has an inverting integrator 10 'and an alternative embodiment of a limiting circuit 22' (described further below with reference to Fig. 7). A local feedback loop 18 'is used in a non-inverting amplifier and switching means 12 and comprises a resistor R9 and a resistor R10. The resulting gain becomes R9 / R10 + 1. An external feedback loop 20 'comprises a resistor R7 and a resistor R8, where R8 forms a connection between the output OUT and an input of the inverting integrator 10'. The resulting gain is R8 / R7.
    The general circuit diagram shown in Fig. 7 corresponds to the block diagram in Fig. 6. The switching means 12 together with the resistors R9 and R10 form a local non-inverting amplifier. An inverting integrator consists of a gain circuit 28, a resistor R11 and a capacitor C11. The amplification circuit 28 together with the resistors R7 and R8 form an inverting integrator 10 'with an external feedback loop. The amplification circuit 28 has an output 29 which is connected to the switching means 12.
    The alternative embodiment of the limiting circuit 22 'shown in Fig. 7 is based on a balance point between a resistor R14 and a resistor R15. As long as the balance point remains at a zero value, the limiting circuit 22 'is not active. However, if the output 29 of the amplifying circuit 28 were to AH p4282seO0 ps sedoc 10-02-22 ver. 3 10 15 20 25 30 9 yes drift as a result of cutting, the balance point will drift away from the zero value towards an error value. When the error value reaches a predetermined value, in the embodiment shown around 600mV, either a transistor Q5 or a transistor Q7 is activated and current is conducted through either a resistor R23 or a resistor R24. The result is also that either transistor Q6 or transistor Q8 will conduct, thereby reducing the error value and preventing saturation.
    In the embodiment shown in Fig. 7, an integrator gain of the integrator circuit 10 ”is equal to R15 / R14. The integrator gain multiplied by the gain of the local feedback loop 18 'shall be equal to the external gain loop consisting of a resistor R7 and a resistor R8.
    The switching means 12 can of course be implemented in the manner shown in Fig. 4 and Fig. 8, respectively (below).
    In the embodiment shown in Fig. 8, the limiting circuit 22 is connected to compare an input signal UIN with a part of the output signal from the integrator circuit 10. The part is determined by a resistor R25 and a resistor R26. If the resistor R25 is equal to the resistor R26, the part is 1/2. In this case, the local feedback loop 18 has a gain of R8 + R10 / R8, which multiplied by an integrator gain must be equal to, or substantially equal to, the external gain determined by resistor R42 and resistor R43. By selecting the resistor R42 and the resistor R43 so that the gain is 9.0 and selecting the resistor R10 and the resistor R8 so that the gain is 4.5, the gain of the integrator will be 2.0.
    In accordance with the invention, there has been provided a class D amplifier with the gain 1 / K + 1 and a front-mounted integrating error amplifier which works to provide an external gain of 1 / K + 1 and which is provided with a limiting circuit comparing the input signal. with the output signal from the error amplifier and by acting on the negative input of the error amplifier limits the error to the desired level.
    It is to be understood that although descriptive embodiments of the invention have been included in particular, various modifications will be apparent to those skilled in the art without departing from the scope and spirit of the invention. Accordingly, the intention is not to limit the scope of protection of the appended claims to AH p4282seOO ps sedoc 10-0222 ver. The present description, but the claims are to be construed as including such equivalent solutions as will be apparent to one skilled in the art to which the invention pertains.
    AH p4282se0O ps sedoc 10-02-22 ver. 3
    权利要求:
    Claims (7)
    [1]
    A power amplifier for amplifying an electrical input signal in a frequency operating range and providing an output signal, comprising a switching means (12) for generating a square signal by alternately conducting the square signal to a first supply voltage and a second supply voltage, filter means (14, 16) for generating a power output signal by low-pass filtering of the square signal, input signal means for receiving the electrical signal and driving the switching means, the input signal means comprising an integrator circuit (10) which generates one of a difference between the output signal and the electrical signal. error signal formed in the input signal and which provides an integrator gain in the frequency operating range, and the power amplifier therewith comprises a local feedback circuit (18), which leads the output signal to an input of the switching means, and an external feedback circuit (20), which leads the output signal to a first input of the integrator circuit (10), where an output ho The integrator circuit is connected to the input of the switching means, characterized in that a limiting circuit (22) is connected to receive the electrical input signal and an output signal from the integrator circuit and connected to the integrator circuit to limit the gain of the integrator circuit, when a difference between the electrical input signal and the output signal of the integrator circuit exceeds a predetermined value.
    [2]
    A power amplifier according to claim 1, wherein a first input of the limiting circuit (22) is connected to an input of the input signal means, a second input of the limiting circuit is connected to the output of the integrator circuit (10), and an output of the limiting circuit (22) is connected to a second input of the integrator circuit (10). AH p4282seO0 ps sedoc 10-02-22 ver. 3 10 15 20 25 30 12
    [3]
    A power amplifier according to claim 2, wherein the first input (10) of the integrator circuit (10) is an inverting input and the second input of the integrator circuit is a non-inverting input.
    [4]
    A power amplifier according to claim 1, wherein the frequency operating range is an audio frequency band.
    [5]
    A power amplifier according to claim 1, wherein the external feedback circuit has a gain that is substantially equal to a gain of the local feedback circuit multiplied by the integrator gain.
    [6]
    A power amplifier according to claim 1, wherein the switching means (12) comprises a first switch (S1) and a second switch (S2), the first switch (S1) switching on a first supply voltage (24) and the second switch (S2) switches on a second supply voltage (26) to create the output signal.
    [7]
    Method for amplifying an electrical input signal in a frequency operating range and providing an output signal by generating a square signal by alternately connecting the square signal to a first voltage supply and a second voltage supply, low-pass filtering of the square signal, providing a local reconnection the output signal to an input of a switching means, providing an external feedback of the output signal to a first input of an integrator circuit, integrating and amplifying an error signal made up of a difference between the input signal and the output signal, applying the integrated and amplified error signal to the switching means, know the drawn measures determining a difference between the electrical input signal and the integrated and amplifying error signal and limiting the gain of the error signal when the difference between the electrical input signal and the integrated and amplified error signal exceeds a predetermined value. AH p4282se00 ps sedoc 10-02-22 ver. 3
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    同族专利:
    公开号 | 公开日
    EP2425528B1|2014-11-19|
    WO2010126440A1|2010-11-04|
    ES2528319T3|2015-02-06|
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    NL7511161A|1974-09-24|1976-03-26|Clayton L Sturgeon|METHOD AND DEVICE FOR AMPLIFYING AN ELECTRICAL SIGNAL.|
    EP0968565A2|1998-01-22|2000-01-05|Koninklijke Philips Electronics N.V.|Pwm amplifier|
    US6107875A|1998-10-15|2000-08-22|Intersil Corporation|Variable frequency class D modulator with built in soft clipping and frequency limiting|
    JP2005523631A|2002-04-19|2005-08-04|コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ|Power amplifier|
    US7400191B2|2006-04-07|2008-07-15|Manuel De Jesus Rodriguez|Switching power amplifier|
    US7671675B2|2007-08-20|2010-03-02|Rohm Co., Ltd.|Output limiting circuit, class D power amplifier and audio equipment|EP3416285B1|2017-06-16|2021-06-02|ICEpower a/s|Self-oscillating amplifier system|
    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    SE0950295A|SE536297C2|2009-04-30|2009-04-30|Power Amplifier|SE0950295A| SE536297C2|2009-04-30|2009-04-30|Power Amplifier|
    PCT/SE2010/050468| WO2010126440A1|2009-04-30|2010-04-28|Power amplifier|
    ES10726642.1T| ES2528319T3|2009-04-30|2010-04-28|Power amplifier|
    US13/266,861| US8330542B2|2009-04-30|2010-04-28|Power amplifier|
    EP20100726642| EP2425528B1|2009-04-30|2010-04-28|Power amplifier|
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