专利摘要:
The present invention relates to a through-hole side plating method of a printed circuit board, and more specifically, it is coated on the inner wall of the hole by only slightly modifying the conditions of normal hole processing and copper plating thickness without any additional process or significant change in the process. By increasing the plating thickness of the paper, it is possible to prevent connection defects and malfunctions due to the scratch phenomenon that occurs when connecting the terminals, and to thereby secure the reliability of the device. The present invention relates to a plating method, which comprises punching a set-up printed circuit board into slot type bits with cut speed, chip load and step cycle conditions, and using aluminum foil to absorb heat generated during drilling. ; In the plating process under the conditions of current density, plating time, through power, and anode ratio, and a catalyst, a drill bit, and a dummy board are used, the hole machining process is set to 1.6T 2EA, and the cut is performed. The speed and chip load are 175-185 m / min and 4-6 µm / REV, the current density and plating time are 2.7-2.9 S AMP / dm 2 and 80-95 minutes, and the through power is 115-125. By setting the percentage, the thickness of the coating on the inner wall of the hole can be increased not only by changing the normal hole processing conditions and the conditions of copper plating thickness, but also by adding a separate process or a large change in the process. It is possible to prevent connection defects and malfunctions due to scratches that occur during the operation, thereby securing the reliability of the device.
公开号:KR20040034748A
申请号:KR1020020062788
申请日:2002-10-15
公开日:2004-04-29
发明作者:최양윤;이철섭
申请人:타이코에이엠피 주식회사;
IPC主号:
专利说明:

The plating method insid of hole for printed circuit board}
[1] The present invention relates to a through-hole side plating method of a printed circuit board, and more specifically, it is coated on the inner wall of the hole by only slightly modifying the conditions of normal hole processing and copper plating thickness without any additional process or significant change in the process. By increasing the plating thickness of the paper, it is possible to prevent connection defects and malfunctions due to the scratch phenomenon that occurs when connecting the terminals, and to thereby secure the reliability of the device. It relates to a plating method.
[2] As is well known, a printed circuit board has a copper foil wiring pattern formed on an epoxy insulating board, and a copper foil having a wiring pattern is coated on only one side of the insulating board, called a single-sided printed circuit board. A pattern coated with copper foil is called a double-sided printed circuit board, and a single-sided printed circuit board or a double-sided printed circuit board having a plurality of stacked structures is called a multilayer printed circuit board.
[3] Such a printed circuit board is generally formed by drilling a blind via hole, a through hole, and an insertion hole for terminal connection on an insulated substrate obtained in a required size from the original plate, wherein the through hole is used to electrically connect the upper and lower copper foils of the printed circuit board. It is formed in order to conduct electrical conduction, and for this purpose, copper is coated on the inner wall of the through hole through electroless plating (PTH) and electroplating (PTN).
[4] Then, a wiring pattern is formed on the insulated substrate through printing and etching process, and a series of printed circuit boards are formed through solder mask, hot air solder leveling (HASL), external processing and product inspection. It is intended to complete the manufacture.
[5] The conventional copper plating thickness of 30 μm coated on the inner wall of the hole is often scratched when connecting the terminal, that is, the terminal cannot keep the copper plating thickness of the first 30 μm by scratching the copper foil on the inner wall of the hole. As a result, malfunctions caused by poor connection or error between the connection terminal and the pattern have been caused, resulting in deterioration of the reliability of the equipment.
[6] Accordingly, in order to solve the conventional problems as described above, attempts have been made to increase the diameter of the hole and to make the inner wall plating thickness of the hole thicker, but the work is time-consuming and inconvenient. There was a problem that can not be applied in reality by causing a decrease in productivity due to the inefficiency of.
[7] Therefore, the present invention was devised to solve the conventional problems as described above, the purpose of which is to change the hole processing conditions and copper plating thickness-specific conditions only by slightly modifying the hole without adding a separate process or a large change in the process. In order to increase the plating thickness on the inner wall, it is possible to prevent connection failure and malfunction due to the scratch phenomenon occurring at terminal connection, thereby ensuring the reliability of the device.
[8] In order to achieve the object of the present invention, the printed circuit board is drilled into slot-type bits with the conditions of cut speed, chip load and step cycle, and holes are made to absorb heat generated during drilling using aluminum foil. Process; In the plating process under the conditions of current density, plating time, through power, and anode ratio, and a catalyst, a drill bit, and a dummy board are used, the hole machining process is set to 1.6T 2EA, and the cut is performed. The speed and chip load are 175-185 m / min and 4-6 µm / REV, the current density and plating time are 2.7-2.9 S AMP / dm 2 and 80-95 minutes, and the through power is 115-125. Provided is a through-hole side plating method of a printed circuit board characterized in that a percentage.
[9] In addition, the aluminum foil is characterized in that the thickness of 140 ~ 160㎛.
[10] In addition, the step cycle is characterized in that four cycles.
[11] In addition, the catalyst is characterized in that the ion type.
[12] In addition, the anode ratio is characterized in that 1.8 times.
[13] In addition, the diameter of the drill bit is characterized in that 0.14 ~ 0.16mm.
[14] In addition, the dummy board is characterized in that 18 to 22%.
[15] Hereinafter, the through-hole side plating method of the printed circuit board according to the present invention with reference to the accompanying drawings will be described with reference to Table 1.
[16] Table 1. Processing Conditions of Through Hole
[17] Processing condition30 μm60㎛ Cut speed (CUT SPEED)150 m / min180 m / min Chip Load30 μm / REV5 μm / REV SET-UP1.6T 3EA1.6T 2EA Aluminum Foil (AL-FOIL)100 μm150 μm BITSLOT TYPESLOT TYPE STEP CYCLE2 CYCLE4 CYCLE
[18] In general, the copper plating thickness of the inner wall of the through-hole of the printed circuit board is 30㎛, the present invention is to form the copper plating thickness of the inner wall of the through-hole larger than 60㎛, the main conditions for the processing is as described later same.
[19] The cut speed is a rotational speed of the drill when the through hole is drilled on the insulating substrate using a drill circumferential speed, that is, a drill, and is 150 m / min. It is increased to 185 m / min, More preferably, it is set as the rotation speed of 180 m / min.
[20] The chip load refers to a descending amount per drill revolution, that is, a descending speed of the drill according to the rotational speed of the drill. The descending amount is usually 30 µm / REV, and the present invention reduces the descending amount from 4 to 6 µm. It is lowered to / REV so that the surface of the inner wall of the through hole by drilling can be more precisely processed That is, while the rotational speed of the drill is increased while the descending amount and speed are slowed, more precise surface finishing can be achieved, and it will be more preferable here to set it to 5 µm / REV.
[21] The setup (SET-UP) refers to the overlapping of the insulating substrate, and in general, when the drill processing, the insulating substrate is not processed by a single sheet, but by stacking several sheets to be perforated at a time, previously thick Drilling was performed by superimposing three insulating substrates having 1.6, but the present invention is to reduce the number of insulating substrates having the same thickness to two, so that the drill processing is carried out to enable more precise and stable processing and operation.
[22] The aluminum foil (AL-FOIL) is a means for absorbing the heat of the insulating substrate generated by the drilling process to absorb the heat of the insulating substrate by spreading an aluminum foil having excellent thermal conductivity on the overlapping insulating substrate. In the past, an aluminum foil having a thickness of 100 μm was used, but the present invention uses an aluminum foil having a thickness of 140 μm to 160 μm to absorb more heat generated from an insulating substrate by a higher speed drill. In this case, the thickness is more preferably 150 µm, and the bit Bit is a slot type as in the past.
[23] The step cycle (STEP CYCLE) refers to moving up and down frequency during drilling, that is, to move the drill up and down, it is called 1 cycle (CYCLE), while conventionally consists of 2 cycles, the present invention is 4 cycles.
[24] After the through-holes are formed in accordance with such processing conditions, copper plating is performed to coat copper on the inner wall of the through-holes. The main working conditions according to the thickness are shown in the following table.
[25] Table 2. Main Working Conditions According to Copper Plating Thickness
[26] Working condition30 μm60㎛ Current density2.0 S AMP / dm2.8 S AMP / dm Plating time60 minutes90 minutes Throughing power100%120% CatalystCroid typeIon type Anode rateTwice1.8x Drill bitDIA + 0.1mmDIA + 0.15 mm Dummy board10% use20% use
[27] The current density is the amount of current per unit area of the conductor or medium through which the current flows. Previously, the current density was 2.0 S AMP / dm 2, and the present invention increased the current density to 2.7 to 2.9 S AMP / dm 2, and also the plating time. Previously, 60 to 80 minutes at 60 minutes, but here it would be more preferable to set the current density of 2.8 S AMP / dm 2 and the plating time of 90 minutes.
[28] In addition, the through power, that is, the plating rate between the surface of the substrate and the hole was previously increased to 100% and the present invention increased to 115 to 125%, and the catalyst was previously known as a CROID-TYPE. ) Is the ion type (ION-TYPE), the anode (Amod) ratio, that is, the copper plate area ratio has been reduced from 1.8 times to 2 times. At this time, the through power is preferably set to 120%.
[29] And the drill bit (Drill bit) was previously used a bit having a diameter of 0.1mm, in the present invention used a drill bit having a diameter of 0.14 ~ 0.16mm to increase the hole of the hole, in order to reduce the plating deviation The used board, that is, the dummy board, is designed to reduce the plating deviation by increasing the current from 10% to 18 to 22%. The drill bit has a diameter of 0.15 mm and the dummy board is 20%. It is desirable to.
[30] As described above, the present invention allows the plating thickness applied to the inner wall of the hole to be made larger by only slightly modifying ordinary hole processing conditions and copper plating thickness conditions without adding a separate process or a large change in the process. It is possible to prevent connection failures and malfunctions due to the scratch phenomenon occurring, thereby ensuring the reliability of the device.
权利要求:
Claims (7)
[1" claim-type="Currently amended] A hole processing step of punching the set-up printed circuit board into slot type bits with the conditions of cut speed, chip load, and step cycle, and absorbing heat generated when punching using aluminum foil;
In the plating process under the conditions of current density, plating time, through power, anode ratio, catalyst, drill bit, dummy board is used in the plating process,
The hole processing process is set at 1.6T 2EA, the cut speed and the chip load are set at 175 to 185 m / min and 4 to 6 μm / REV, and the current density and plating time are 2.7 to 2.9 S AMP / dm 2. And 80 to 95 minutes and the through power of 115 to 125%.
[2" claim-type="Currently amended] The method of claim 1, wherein the aluminum foil has a thickness of 140 to 160 µm.
[3" claim-type="Currently amended] The method of claim 1, wherein the step cycle is four cycles.
[4" claim-type="Currently amended] The method of claim 1, wherein the catalyst is ion type.
[5" claim-type="Currently amended] The method of claim 1, wherein the anode ratio is 1.8 times.
[6" claim-type="Currently amended] The method of claim 1, wherein the drill bit has a diameter of 0.14 to 0.16 mm.
[7" claim-type="Currently amended] The method of claim 1, wherein the dummy board is 18 to 22%.
类似技术:
公开号 | 公开日 | 专利标题
US20150216055A1|2015-07-30|Method for manufacturing printed wiring board
US8966750B2|2015-03-03|Method of manufacturing a multilayered printed wiring board
US6195882B1|2001-03-06|Method for producing printed wiring boards
US8413324B2|2013-04-09|Method of manufacturing double-sided circuit board
US7671281B2|2010-03-02|Multilayer wiring circuit board
US4258468A|1981-03-31|Forming vias through multilayer circuit boards
US7152318B2|2006-12-26|Method for manufacturing built-up printed circuit board with stacked type via-holes
JP4203435B2|2009-01-07|Multilayer resin wiring board
US7644497B2|2010-01-12|Component built-in wiring board and manufacturing method of component built-in wiring board
US7002080B2|2006-02-21|Multilayer wiring board
JP4287733B2|2009-07-01|Multi-layer printed wiring board with built-in electronic components
US5985760A|1999-11-16|Method for manufacturing a high density electronic circuit assembly
US20120234587A1|2012-09-20|Printed wiring board, printed circuit board unit, electronic apparatus and method for manufacturing printed wiring board
US7514298B2|2009-04-07|Printed wiring board for mounting semiconductor
KR20100017926A|2010-02-16|A method of forming a multilayer substrate core structure using sequential microvia laser drilling and substrate core structure formed according to the method
CN101695218B|2011-07-27|Method for manufacturing printed circuit board with half-edge hole
KR100733253B1|2007-06-27|High density printed circuit board and manufacturing method thereof
JP4955263B2|2012-06-20|Printed wiring board
KR20040056445A|2004-07-01|A printed circuit board with embedded capacitors, and a manufacturing process thereof
CN101053286B|2012-01-18|Electrochemical method for filling hole with metal, especially with copper filling hole of printed circuit board
US20060180346A1|2006-08-17|High aspect ratio plated through holes in a printed circuit board
CN100437988C|2008-11-26|Multilayer circuit board, process of manufacturing same, board for multilayer circuitry, and electronic apparatus
US20040118605A1|2004-06-24|Circuit board having a multi-functional hole
US9185791B2|2015-11-10|Manufacturing method of printing circuit board with micro-radiators
CN101472404B|2011-12-07|Multi-layer circuit board and manufacturing method thereof
同族专利:
公开号 | 公开日
KR100452153B1|2004-10-12|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
2002-10-15|Application filed by 타이코에이엠피 주식회사
2002-10-15|Priority to KR10-2002-0062788A
2004-04-29|Publication of KR20040034748A
2004-10-12|Application granted
2004-10-12|Publication of KR100452153B1
优先权:
申请号 | 申请日 | 专利标题
KR10-2002-0062788A|KR100452153B1|2002-10-15|2002-10-15|The plating method insid of hole for printed circuit board|
[返回顶部]