• 专利附录
  • 专利说明
  • 权利要求
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  • 引用文献
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    • 专利摘要:
    PURPOSE: A device and a method for dividing a screen into high-definition multiple screens of multi-channel input are provided to increase the resolution by four times for precisely recognizing pictures of an object recorded in a security system. CONSTITUTION: A method for dividing a screen into high-definition multiple screens of multi-channel input includes m decoding units(300) for m channels for decoding analog images corresponding to respective channels to digital video data of resolution of 720x480 in case of a single screen(n=1), 640x480 in case of four screens(n=2), 426.66x320 in case of nine screens(n=3), and 320x240 in case of sixteen screens(n=4), m first memory elements(301) for storing the digital video data corresponding to the m channels at a clock speed of a first frequency respectively, a second memory element(302) for high speed access for sequentially converting digital video data of the m channels stored in the m first memory elements into the YUV format of 16 bit at a clock speed of a second frequency, a scaling element(305) for converting video data of resolution of 1280x960 produced by high speed access of the YUV digital video data at a clock speed of a third frequency under a synchronization signal into video data of resolution of 1280x1024, and a D/A converter(306) for converting the digital video signal of the resolution of 1280x1024 into analog R,G,B signals.
    公开号:KR20020095707A
    申请号:KR1020010033882
    申请日:2001-06-15
    公开日:2002-12-28
    发明作者:임인건；장철진；박준석
    申请人:주식회사 성진씨앤씨；
    IPC主号:
    专利说明:

    High quality multi-screen splitting device and method of multi-channel input {METHOD AND APPARATUS FOR HIGH-DEFINITION MULTI-SCREEN DISPLAY}
    [17] BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multi-screen splitting device, and more particularly, to a multi-channel input for displaying a multi-channel image input from a plurality of video cameras in a security system on a high-definition display device such as a computer monitor. A multi-screen split technology.
    [18] A security system using a digital video recorder (DVR) that compresses and stores images captured from an image capturing device such as a video camera or a CCD camera is widely used in banks, stores, and homes. .
    [19] However, in order to improve the security capability of the surveillance system, a system for installing a plurality of cameras, compressing, storing, and displaying video signals transmitted from the plurality of cameras is commonly used.
    [20] In order to display images of a plurality of channels transmitted by such a plurality of cameras, a method of dividing one monitor into a plurality of channels and displaying each channel simultaneously is used. In other words, a quad-screen or a 16-split display using a single monitor allows multiple channels to be simultaneously displayed on a single screen.
    [21] 1 is a diagram illustrating a configuration of a system for split-displaying multiple channels on one monitor according to the related art. Referring to FIG. 1, each surveillance camera 90 inputs a captured video signal 100 to a decoder 101 to convert an analog image into a digital video signal.
    [22] At this time, the decoder 101 converts into a digital video signal of the International Telecommunication Union's standard video format (ITU-R) and stores it in the FIFO (First-In First-Out) storage device 102. That is, in order to display an image transmitted by each surveillance camera 90 on, for example, four divided screens, digital video data may be stored once in the FIFO 102 in order to synchronize the image of each channel. do.
    [23] Next, under the control of an erasable programmable logic device (EPLD) 104, the first FIFO 102, the second FIFO, the third FIFO,... , The n-th FIFO and the like are alternately accessed to scan the divided screens one by one. For example, when a 640 × 480 resolution television monitor is configured with four screens and the multiscreens 106, 107, 108, and 109 with 320 × 240 resolution, the first line of the first screen 106 is scanned. After reading data from the first FIFO, data must be retrieved from the second FIFO to scan the second screen 107 under control of the EPLD 104.
    [24] In this way, the digital video data sequentially synchronized and accessed from the plurality of FIFOs 102 is converted into an analog signal through a digital signal processor and a D / A converter built in the encoder 103 and output to the monitor 105. do. However, in the case of the multi-channel multi-screen split system according to the prior art (hereinafter, the four-split system will be described mainly), the maximum resolution is 640 × 480, and in the case of the 4-split screen, the resolution for each channel is 320 × 240. In the case of a 16-split screen, the resolution is 160 x 120.
    [25] As a result, there is a problem in that the image quality is degraded due to poor resolution when attempting to substantially recognize photographed images photographed on a multi-channel multi-split screen. In particular, when a screen captured on a multi-channel multi-split screen is a crime scene of a criminal, it is technically difficult to grasp an impression of the criminal with 320 × 240 resolution (four-split screen) or 160 × 120 resolution (16-split screen). .
    [26] Accordingly, it is a first object of the present invention to provide a multi-channel multi-screen splitting apparatus and method for dividing and processing an image at a high-definition television (HDTV) -class ultra-high resolution even if one monitor is used.
    [27] The second object of the present invention is, in addition to the first object, the final resolution of multi-channel multi-screen display on one monitor is SD (640 × 480 x 30i) output and SD output for VCR recording or TV display The present invention provides an apparatus and method capable of displaying a 1280 × 1024 SXGA-class non-interlaced display that realizes four times the resolution of the present invention.
    [28] That is, an object of the present invention is to implement the resolution as shown in Table 1 attached to the video decoder resolution output and the actual final screen resolution according to the screen division.
    [29] Resolution of split screen according to the present inventionPer channel resolution Resolution Per Vertical Sync 1 screen 720 × 480 720 × 240 4 screen 640 × 480 640 × 240 9 screen 426 × 320 426 × 160 16 screen 320 × 240 320 × 120
    [1] 1 is a diagram illustrating a configuration of a system for split-displaying multiple channels on one monitor according to the related art.
    [2] 2 is a diagram illustrating an image resolution displayed by a multi-channel high-definition multi-split display device according to an exemplary embodiment of the present invention, wherein each divided screen shows a resolution of 640 × 480.
    [3] 3 is a diagram illustrating a configuration of a driving circuit of the high-definition multi-channel multi-split display device according to the present invention.
    [4] <Explanation of symbols for the main parts of the drawings>
    [5] 90: surveillance camera
    [6] 100: Video signal
    [7] 101, 300: decoder
    [8] 102, 301: first-in first-out (FIFO)
    [9] 103: encoder
    [10] 104,303: EPLD
    [11] 105: monitor
    [12] 106, 107, 108, 109: Quad screen with 320 × 240 resolution (prior art)
    [13] 200, 201, 202, 203: Quad screen with 640 × 480 resolution (invention)
    [14] 302: Synchronous DRAM (SDRAM)
    [15] 305: scaler chip
    [16] 306: DAC (DAC)
    [30] In order to achieve the above object, according to the present invention, when a screen of a computer monitor having a resolution of 1280 × 1024 is divided into four divided screens to display four channels of video, the analog video per channel is decoded to 640 × 480 resolution. Storing the generated digital video data in a first storage means corresponding to each channel at a clock speed; Storing the digital video data stored in the first storage means in a second storage means accessible at a higher speed than the first storage means at a clock speed with a second frequency higher than the first frequency; Digital video data of 1280x1024 resolution is accessed by accessing digital video data of 1280x960 resolution using a third frequency higher than the second frequency as a clock under control of a synchronization signal from four second storage means corresponding to four channels, respectively. Scaling with data; And converting the digital video data having the resolution of 1280 × 1024 into an analog signal to generate an RGB signal.
    [31] In the conventional split screen display apparatus, a computer monitor output apparatus employing a non-interlace method is used because it scans an output video signal in an interlace manner. Although there is a limitation, the present invention discloses a high-definition multi-channel screen division technique using a high speed digital signal processing technique in order to solve the above problems.
    [32] Hereinafter, a high quality multi-channel screen division technique according to the present invention will be described in detail with reference to FIGS. 2 and 3.
    [33] The present invention is characterized by displaying the high resolution as it is without scaling (scaling) the image transmitted from the camera. That is, in the case of the 4-split display, the decoder 101 scaled to 320 × 240 in the related art, and thus, the present invention is characterized in that signal processing is performed while maintaining the resolution of 640 × 480.
    [34] In addition, even in the case of a single screen, the present invention maintains the resolution of 720 × 480, which was conventionally decoded to 640 × 480.
    [35] 2 is a diagram illustrating an image resolution displayed by a multi-channel high-definition multi-split display device according to an exemplary embodiment of the present invention, wherein each divided screen shows a resolution of 640 × 480. That is, referring to FIG. 2, each of the screens 200, 201, 202, and 203 has a resolution of 640 × 480 in the 4-split high-definition display device, thus providing a total resolution of 1280 × 960.
    [36] Therefore, in order to access data from the FIFO constituting the high-definition multichannel multi-division display apparatus according to the present invention, data must be read at a rate of 1280 x 960 x 30 ms = 36,864,000 bits per second (BPS). As a preferred embodiment of the present invention, a data access method that reads from a FIFO can be designed to read digital video data 16 bits at 40 MHz.
    [37] 3 is a diagram illustrating a configuration of a driving circuit of the high-definition multi-channel multi-split display device according to the present invention. Referring to FIG. 3, first, the video decoder 300 converts an image analog input video signal of each channel into a digital signal and stores it in the FIFO 301. As a preferred embodiment of the present invention, the decoder 300 can write 16 bits into the FIFO 301 at a rate of 13.5 MHz.
    [38] Meanwhile, the input FIFOs 301 are controlled by the selected sync signal among the sync signal applied from the outside or the sync signal generated by the internal sync signal generator 310 and the information on the screen division, thereby controlling the YUV 16 as the image data. Output a bit. These image data have an interlace scan signal specification of 1280 x 960 x 60 Hz.
    [39] Subsequently, as a preferred embodiment according to the present invention, the above-described 16-bit YUV digital video data can be designed to be separated into two paths, such as an SD output and a high definition display for VCR recording or TV display. According to a preferred embodiment of the present invention, in the case of applying an SD class display, 1280 × 960 × 60 ＠ interlaced image data is converted into 640 × 480 × 60㎐ interlace information for the SD display, and stored at the output FIFO at a controlled timing. Can be output to video encoders and VIP ports.
    [40] At this time, the video encoder converts the digital video data into an analog video signal and outputs the analog video signal. When performing an HD display according to another embodiment of the present invention, the image data is divided into SDRAM (for fast access (i.e., 1280 x 960 x 60 ms interlace 108 MHz or 1280 x 960 x 30 ms sequential scan 54 MHz). 302).
    [41] As a preferred embodiment according to the present invention, a high speed memory such as SGRAM can be used. Subsequently, it is output by the controlled timing to convert YUV 4: 2: 2 into YUV 4: 4: 4, and output it in RGB 24-bit through a color space converter.
    [42] As another embodiment of the present invention, the color space converter may be analog or digital. As a preferred embodiment of the present invention, the SDRAM can use two pairs to alternate write and read (write / read), and use YUV data to reduce the number of memory input / output bits.
    [43] Referring back to FIG. 3, the scaler chip 305 receives a 1280 × 960 × 60㎐ interlace 108MHz or 1280 × 960 × 30㎐ sequential scan 54MHz input and performs 1280 × 1024 scaling as a final output, Frame rate conversion is performed as a reference.
    [44] In addition, the scaler chip 305 according to the present invention may output an RGB 24-bit by mixing the OSD. These data are converted into an analog RGB signal via the DAC 306 and displayed. On the other hand, for display on a high-definition monitor, instead of RGB output, digital or analog output such as YUV or TMDS can be applied.
    [45] In the above, the preferred embodiment of the present invention has been described mainly with a 4-split high resolution display device, but the 9-split or 16-split screen can be extended to the spirit of the present invention. In addition, although the above description has been focused on NTSC, it is possible to extend the PAL method.
    [46] The foregoing has outlined rather broadly the features and technical advantages of the present invention to better understand the claims of the invention which will be described later. Additional features and advantages that make up the claims of the present invention will be described below. It should be appreciated by those skilled in the art that the conception and specific embodiments of the invention disclosed may be readily used as a basis for designing or modifying other structures for carrying out similar purposes to the invention.
    [47] In addition, the inventive concepts and embodiments disclosed herein may be used by those skilled in the art as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. In addition, such modifications or altered equivalent structures by those skilled in the art may be variously changed, substituted, and changed without departing from the spirit or scope of the invention described in the claims.
    [48] As described above, the present invention can be expected to increase the resolution four times as compared to the conventional multi-channel multi-screen split display device, it is possible to accurately recognize the target image recorded in the surveillance security system.
    [49] In addition, the present invention provides SD (640 x 480 x 30i) output, thereby enabling VCR recording or TV display. In addition, the present invention does not use four QUAD chips to implement 16 channels, and thus, there is an advantage in that the system configuration can be reduced in cost.
    权利要求:
    Claims (13)
    [1" claim-type="Currently amended] A method of dividing a screen of a computer monitor having a resolution of 1280 × 1024 into four divided screens to display four channels of images,
    Storing digital video data generated by decoding an analog image for each channel with 640 x 480 resolution, in a first storage means corresponding to each channel at a first clock speed;
    Storing the digital video data stored in the first storage means at a clock speed at a second frequency higher than the first frequency in the second storage means accessible at a higher speed than the first storage means;
    Accessing digital video data of 1280 x 960 resolution using a third frequency higher than the second frequency as a clock from four second storage means respectively storing digital video data corresponding to four channels under the control of a synchronization signal. Scaling with digital video data of 1280 × 1024 resolution; And
    Generating an RGB signal by converting the digital video data having the resolution of 1280 × 1024 into an analog signal;
    Split display method comprising a.
    [2" claim-type="Currently amended] The method of claim 1, wherein the first frequency is 13.5 MHz, the second frequency is 40 MHz, and the third frequency is 54 MHz.
    [3" claim-type="Currently amended] In the method of dividing the screen of a computer monitor having a resolution of 1280 × 1024 into nine divided screens to display an image of nine channels,
    Storing the digital video data generated by decoding the 426 × 320 resolution of the analog video for each channel in a first storage means corresponding to each channel at a clock speed;
    Storing the digital video data stored in the first storage means at a clock speed at a second frequency higher than the first frequency in the second storage means accessible at a higher speed than the first storage means;
    Digital video data of 1280x1024 resolution by accessing digital video data of 1280x960 resolution using a third frequency higher than the second frequency as a clock under control of a synchronous signal from nine second storage means corresponding to nine channels, respectively. Scaling with data; And
    Generating an RGB signal by converting the digital video data having the resolution of 1280 × 1024 into an analog signal;
    Split display method comprising a.
    [4" claim-type="Currently amended] 4. The method according to claim 3, wherein the first frequency is 13.5 MHz, the second frequency is 40 MHz, and the third frequency is 108 MHz.
    [5" claim-type="Currently amended] In the method of displaying a 16-channel image by dividing the screen of a computer monitor having a resolution of 1280 × 1024 into 16 divided screens,
    Storing digital video data generated by decoding an analog image per channel at 320 × 240 resolution, in a first storage means corresponding to each channel at a first clock speed;
    Storing the digital video data stored in the first storage means at a clock speed at a second frequency higher than the first frequency in the second storage means accessible at a higher speed than the first storage means;
    Digital video data of 1280x1024 resolution is accessed by accessing digital video data of 1280x960 resolution using a third frequency higher than the second frequency as a clock from 16 second storage means corresponding to 16 channels, respectively, under the control of a synchronization signal. Scaling with data; And
    Generating an RGB signal by converting the digital video data having the resolution of 1280 × 1024 into an analog signal;
    Split display method comprising a.
    [6" claim-type="Currently amended] The method of claim 5, wherein the first frequency is 13.5 MHz, the second frequency is 40 MHz, and the third frequency is 184 MHz.
    [7" claim-type="Currently amended] 6. A method according to claim 1, 3 or 5, wherein the first storage means comprises a FIFO.
    [8" claim-type="Currently amended] 6. The method according to claim 1, 3 or 5, wherein the second storage means comprises SDRAM or SGRAM.
    [9" claim-type="Currently amended] In a device for dividing a screen of a computer monitor having a resolution of 1280 × 1024 into m (where m = n × n, n is a natural number) into multiple divided screens and displaying m channels of images on each divided screen. ,
    Analog video corresponding to each channel is 720 x 480 resolution for single screen (n = 1), 640 x 480 resolution for 4 screen (n = 2), and 9 screens (n = 3) for analog screen. M decoding means corresponding to m channels for decoding 426.66 x 320 resolution and 16 screens (n = 4) into digital video data having 320 x 240 resolution;
    M first storage means for storing digital video data corresponding to each m channel generated by the m decoding means at a first clock speed;
    Second storage means for fast access for sequentially converting m-channel digital video data stored in the m first storage means into a 16-bit YUV format and storing a second frequency at a clock speed;
    Converting 1280 × 960 video data generated by fast accessing the third frequency at a clock speed to YUV digital video data corresponding to the m channels from the second storage means into video data having 1280 × 1024 resolution. Scaling means; And
    D / A conversion means for converting a digital video signal of 1280 × 1024 resolution output by the scaling means into an analog RGB signal
    Split screen display device comprising a.
    [10" claim-type="Currently amended] In a device for dividing a screen of a monitor having a resolution of p × q into m (where n = n × n, where n is a natural number) multi-split screen, and displaying m channels of images on each split screen,
    M decoding means for decoding the analog image corresponding to each channel into digital video data having (p / n) x (q / n) resolution;
    M first storage means for storing digital video data corresponding to each m channel generated by said m decoding means at a first clock speed;
    Second storage means for fast access for sequentially converting m-channel digital video data stored in the m first storage means into a 16-bit YUV format and storing a second frequency at a clock speed;
    Scaling means for converting video data generated by fast access of a third frequency at a clock speed to YUV digital video data corresponding to m channels from the second storage means into video data having a p × q resolution; And
    D / A conversion means for converting a digital video signal having a p × q resolution output by the scaling means into an analog RGB signal
    Split screen display device comprising a.
    [11" claim-type="Currently amended] 11. A screen division display apparatus according to claim 9 or 10, wherein the first storage means comprises a FIFO.
    [12" claim-type="Currently amended] 11. A screen division display apparatus according to claim 9 or 10, wherein said second storage means comprises SDRAM or SGRAM.
    [13" claim-type="Currently amended] The apparatus of claim 9 or 10, wherein the third frequency is m times the first frequency.
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    同族专利:
    公开号 | 公开日
    US20040046706A1|2004-03-11|
    CN1463549A|2003-12-24|
    EP1400122A1|2004-03-24|
    WO2002104034A1|2002-12-27|
    JP2004522365A|2004-07-22|
    EP1400122A4|2005-03-16|
    KR100414159B1|2004-01-07|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2001-06-15|Application filed by 주식회사 성진씨앤씨
    2001-06-15|Priority to KR20010033882A
    2002-12-28|Publication of KR20020095707A
    2004-01-07|Application granted
    2004-01-07|Publication of KR100414159B1
    优先权:
    申请号 | 申请日 | 专利标题
    KR20010033882A|KR100414159B1|2001-06-15|2001-06-15|Method and apparatus for high-definition multi-screen display|
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