Method for fabricating analog device

专利摘要:
The present invention relates to a method for manufacturing an analog device to prevent the silicide film from being formed on the second polysilicon remaining film due to the excessive etching of the dielectric film on the polysilicon resistance during the double polysilicon process, the first method on the silicon semiconductor substrate Sequentially forming polysilicon and a dielectric film, selectively etching the dielectric film and the first polysilicon to form a laminated film of polysilicon resistance and a dielectric film pattern, and forming second polysilicon on the entire surface of the semiconductor substrate Selectively etching the second polysilicon to form a gate electrode on the semiconductor substrate, forming a first silicide layer on the gate electrode, and forming an interlayer insulating layer on the entire surface including the gate electrode; Selectively etching the interlayer insulating layer and the dielectric layer pattern to form the polysilicon The steps of claim exposing only the specified portion, and comprises a step of forming a second silicide layer on said exposed polysilicon always low.
公开号:KR20020058453A
申请号:KR1020000086559
申请日:2000-12-30
公开日:2002-07-12
发明作者:서정훈
申请人:박종섭；주식회사 하이닉스반도체；
IPC主号:

专利说明:

Manufacturing method of analog device {METHOD FOR FABRICATING ANALOG DEVICE}
[13] The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing an analog device having a high polysilicon resistance.
[14] Recently, in the manufacture of analog devices, a first polysilicon is used as a first electrode of a capacitor and at the same time a polysilicon is used as a resistor, and the second polysilicon is used as a gate electrode. The double polysilicon process used as the 2nd electrode of a capacitor is performed.
[15] 1A to 1B illustrate a method of manufacturing an analog device according to the prior art.
[16] As shown in FIG. 1A, a field oxide film 12 is formed on the semiconductor substrate 11 for isolation between devices, and the first polysilicon 13 and ONO (Oxide Nitride Oxide) are formed on the entire surface including the semiconductor substrate 11. 14 is deposited sequentially.
[17] Subsequently, a photoresist film (not shown) is applied on the ONO 14 and patterned by exposure and development, and then the ONO 14 and the first polysilicon 13 are etched using the patterned photoresist as a mask to form a field oxide film. (12) A stacked structure of the first polysilicon pattern, that is, the polysilicon resistor 13 and the ONO 14 is formed on the top. Hereinafter, reference numeral 13 denotes a polysilicon resistor.
[18] Subsequently, after the gate oxide film 15a of the transistor is formed on the semiconductor substrate 11, second polysilicon is deposited on the entire surface of the semiconductor substrate 11. At this time, the pre-production film 15b is formed on the side surface of the polysilicon resistor 13 during precleaning or gate oxidation, which is usually performed before the gate oxide film 15a is formed. Subsequently, the second polysilicon is selectively etched to form the gate electrode 16a on the gate oxide film 15a. At this time, the second polysilicon remaining film 16b having a sidewall shape is formed around the polysilicon resistor 13 during the second polysilicon etching.
[19] Subsequently, a conventional transistor manufacturing process is performed to form the source / drain 17b and sidewall spacers 18 of the LDD (Lightly Doped Drain) structure 17a.
[20] As shown in FIG. 1B, after the silicide film 19a is formed on the surfaces of the gate electrode 16a and the source / drain 17b, the silicide film 19b is also formed on the surface of the polysilicon resistor 13. .
[21] When the silicide layers 19a and 19b are formed, a metal film deposition and heat treatment are performed on the transistor, and as shown in FIG. 2, the interlayer insulating film 100 is deposited and selectively etched on the polysilicon resistor 13. By exposing all surfaces of the polysilicon resistor 13 on which the silicide film is to be formed, transient etching is performed to completely remove the ONO 14 remaining on the polysilicon resistor 13. The silicide film 19b is formed in the exposed silicide film forming region of the polysilicon resistor 13, wherein the silicide film 19c is also formed on the polysilicon residue film 16b exposed by the overetch of the ONO 14. Is formed.
[22] After the interlayer insulating film 20 is formed on the entire surface by a subsequent process, the interlayer insulating film 20 is selectively etched to form contact holes for metal wiring, and the source / drain 17b and the polysilicon resistor 13 are formed through the contact holes. The metal wiring 21 connected to is formed.
[23] However, in the above-described prior art, the second poly produced around the polysilicon resistor 13 and the polysilicon resistor 13 as a result of the transient etching to completely remove the ONO 14 on the polysilicon resistor 13. The silicide film is formed on all of the remaining silicon film 16b to generate a short between the two polysilicon films, or the second polysilicon film 16b acts as a parasitic resistance to be different from the actual resistance value of the polysilicon resistor 13. There is a problem that occurs.
[24] The present invention has been made to solve the problems of the prior art, and provides a method for producing a polysilicon resistor suitable for preventing the change of the resistance value due to the polysilicon residual film, and prevent the short caused by the loss of the inter-silicon dielectric film. Its purpose is to.
[1] 1a to 1b is a view showing a manufacturing method of an analog device according to the prior art,
[2] 2 is a plan view showing an exposed state of a polysilicon resistor for forming a silicide film according to the prior art;
[3] 3 is a view showing an analog device manufactured according to an embodiment of the present invention,
[4] 4 is a plan view showing an exposed state of a polysilicon resistor for forming a silicide film according to an embodiment of the present invention.
[5] * Explanation of symbols for the main parts of the drawings
[6] 31 semiconductor substrate 32 field oxide film
[7] 33: polysilicon resistor 34: ONO
[8] 35a: gate oxide film 35b: pre-production film
[9] 36a: gate electrode 36b: second polysilicon residual film
[10] 37a: LDD region 37b: source / drain
[11] 38 sidewall spacers 39a and 39b silicide films
[12] 40: interlayer insulating film 41: metal wiring
[25] Method of manufacturing an analog device of the present invention for achieving the above object is a step of sequentially forming a first polysilicon, a dielectric film on a semiconductor substrate, by selectively etching the dielectric film and the first polysilicon polysilicon resistance and dielectric film Forming a stacked layer of a pattern, forming a second polysilicon on the entire surface of the semiconductor substrate, selectively etching the second polysilicon to form a gate electrode on the semiconductor substrate, and forming a gate electrode on the gate electrode Forming a first silicide film, forming an interlayer insulating film on the entire surface including the gate electrode, selectively etching the interlayer insulating film and the dielectric film pattern to expose only a predetermined portion of the polysilicon resistance, and the exposed poly And forming a second silicide film on the silicon resistor. It shall be.
[26] Hereinafter, the preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. .
[27] 3 is a view showing a method of manufacturing an analog device according to an embodiment of the present invention, the process before forming the silicide film proceeds in the same manner as in the conventional technique.
[28] Referring to FIG. 3, a method of manufacturing an analog device according to an exemplary embodiment of the present invention will be described. A field oxide film 32 is formed on a semiconductor substrate 31 for isolation between devices, and a first oxide film 32 is formed on the first field oxide film 32. A laminated structure is formed of a polysilicon resistor 33 made of polysilicon and ONO 34 which is a dielectric film.
[29] Subsequently, after the gate oxide film 35a of the transistor is formed on the semiconductor substrate 31, the gate electrode 36a made of the second polysilicon is formed on the gate oxide film 35a. At this time, when the gate oxide film 35a is formed in the same manner as usual, the pre-production film 35b is formed on the side surface of the polysilicon resistor 33, and the second polysilicon remaining film 36b is formed around the polysilicon resistor 33. Is formed. Subsequently, the source / drain 37b and the side wall spacer 38 of the conventional LDD structure 37a are formed.
[30] Next, after the silicide film 39a is formed on the surfaces of the gate electrode 36a and the source / drain 37b, the silicide film 39b is also formed on the surface of the polysilicon resistor 33.
[31] When the silicide films 39a and 39b are formed, a metal film deposition and heat treatment are performed on the transistor, and as shown in FIG. 4, the interlayer insulating film 200 is deposited and selectively etched on the polysilicon resistor 33. Thus, the size of the silicide film 39b is formed on the surface of the polysilicon resistor 33 to be revealed. That is, the predetermined portion of the polysilicon 33 is not exposed, and the ONO 34 remaining on the polysilicon resistor 33 is removed by a predetermined width.
[32] As such, only the portion where the silicide film 39b is to be formed is opened slightly, and the ONO 34 is left on the polysilicon resistor 33 so that the silicide film 39b is formed on the second polysilicon remaining film 36b. The silicide film can be prevented from being formed.
[33] After the interlayer insulating film 40 is formed on the entire surface by a subsequent process, the interlayer insulating film 40 is selectively etched to form contact holes for metal wiring, and the source / drain 37b and the polysilicon resistor 33 are formed through the contact holes. The metal wiring 41 connected to is formed.
[34] Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.
[35] The method of manufacturing the analog device of the present invention as described above has the effect of preventing the change in the resistance value of the polysilicon resistor by removing the parasitic resistance component due to the short of the polysilicon resistor and the second polysilicon residual film.

权利要求:
Claims (5)
[1" claim-type="Currently amended] In the manufacturing method of an analog device,
Sequentially forming a first polysilicon and a dielectric film on the semiconductor substrate;
Selectively etching the dielectric film and the first polysilicon to form a stacked film of a polysilicon resistor and a dielectric film pattern;
Forming a second polysilicon on the front surface of the semiconductor substrate;
Selectively etching the second polysilicon to form a gate electrode on the semiconductor substrate;
Forming a first silicide layer on the gate electrode;
Forming an interlayer insulating film on the entire surface including the gate electrode;
Selectively etching the interlayer dielectric layer and the dielectric layer pattern to expose only a predetermined portion of the polysilicon resistor; And
Forming a second silicide layer on the exposed polysilicon resistor
Method of manufacturing an analog device characterized in that comprises a.
[2" claim-type="Currently amended] The method of claim 1,
Exposing a predetermined portion of the polysilicon resistor,
Coating a photoresist film on the interlayer insulating film and patterning the photoresist film by exposure and development;
Etching the interlayer dielectric layer and the dielectric layer pattern using the patterned photoresist as a mask
Method of manufacturing an analog device characterized in that comprises a.
[3" claim-type="Currently amended] The method of claim 1,
After the formation of the second silicide layer,
And forming a metal wiring connected to the second silicide layer and the first silicide layer.
[4" claim-type="Currently amended] The method of claim 1,
And said first second silicide film is the same silicide film.
[5" claim-type="Currently amended] The method of claim 1,
After the formation of the second silicide layer,
And a predetermined portion of the dielectric film pattern remains on the polysilicon resistor.

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同族专利:

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引用文献:

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公开号 | 申请日 | 公开日 | 申请人 | 专利标题

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法律状态:
2000-12-30|Application filed by 박종섭, 주식회사 하이닉스반도체

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2000-12-30|Priority to KR1020000086559A

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2000-12-30|Priority claimed from KR1020000086559A

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2002-07-12|Publication of KR20020058453A

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2002-10-25|Application granted

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2002-10-25|Publication of KR100358144B1

优先权:

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申请号 | 申请日 | 专利标题

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KR1020000086559A|KR100358144B1|2000-12-30|Method for fabricating analog device|