• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
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  • 优先权
    • 专利摘要:
    A high quality signal, such as a unit bit coded (DSD) audio signal having a 2.822 MHz bit rate fs1, is converted by the sample rate converter 102 into a lower sample rate fs3 PCM signal. The watermark is inserted at a lower sample rate by a conventional watermark inserter 101 that can process signals at this lower rate. Watermarks cannot be used in any other way. By subtracting the unmarked water signal from the watermarked signal, it is sequentially searched and upsampled 104 to an intermediate sampling rate fs2. A DSD signal is converted 110 to a PCM signal at the intermediate sample rate. Thereafter, the retrieved watermark is added to the PCM signal (107), and the watermarked PCM signal is converted back to a unit bit coded DSD signal. In a preferred embodiment, the arrangement is a compensation circuit for compensating the information signal X 'for any (e.g., non-linear) operations performed by the inserter 101 to minimize the estimated watermark WM'. 105. The compensation circuitry reintroduces the operations within the DSD region by controlling parameters such as scaling 106 and 109 and time shift 108.
    公开号:KR20020038699A
    申请号:KR1020027000947
    申请日:2001-05-01
    公开日:2002-05-23
    发明作者:더크 리프만；알폰스 아. 엠. 엘. 브루커스；프란시스커스 엘. 아. 제이. 캄퍼만；안토니우스 아. 엠. 스타링
    申请人:요트.게.아. 롤페즈；코닌클리케 필립스 일렉트로닉스 엔.브이.；
    IPC主号:
    专利说明:

    Watermark insertion and extraction
    [2] Watermarking is a known technique for protecting software against copyright infringement. A typical structure of a watermarking system is shown in FIG. The original signal (X) is the input to the system. The watermark WM is embedded in the signal X by the watermark inserter 100. The watermarked signal Y may not be perceptually identified from X but may be identified by the detector 200. In practice, the watermarked signal Y is subjected to various forms of signal processing P 300 such as, for example, compression. If any form of processing P does not allow the watermark WM to be detected from the processed signal Z, it is said to be fragile. If some tentatively defined signal processing algorithm P makes the watermark WM detectable, and other forms of processing do not allow the watermark to be detected, this is called semi-fragile. . If the watermark WM can only be removed by the pure raw processing P, it is said to be robust, and the reproduced signal is severely degraded.
    [3] During the standardization of watermarking, the music industry has defined various forms of processing P that allow for identification between the types of watermarking described above. Many existing watermarking techniques will be reviewed according to the requirements set by the music industry. This relates to both sound quality and robustness.
    [4] In current audio watermarking equipment, the insertion of watermarks depends heavily on the representation of the audio signal. Existing watermarking techniques are optimized for signals expressed in multiple bits per sample, and the sample rate does not exceed 96 Hz. A known example of such a signal representation is CD audio (16-bit PCM at 44.1 ms). Other representations, such as high speed signals, where amplitude resolution is exchanged with time resolution, require different watermark embedding apparatus or methods. An example of such a signal representation is DSD (Direct Stream Digital, 1-bit samples at 64x44.1 ms) recorded on a Super Audio CD.
    [1] The present invention relates to a method and apparatus for embedding a watermark in an information signal, in particular a high quality audio signal. The invention also relates to a method and apparatus for extracting a watermark from a watermarked signal.
    [8] 1 shows a general structure of a delivery chain comprising a watermark inserter and a watermark detector.
    [9] 2 is a schematic diagram showing an apparatus for embedding a watermark in an information signal according to the present invention;
    [10] 3 is a schematic diagram showing an apparatus for detecting a watermark in an information signal according to the present invention;
    [11] 4 shows an embodiment of an apparatus for embedding a watermark in a unit-bit coded information signal.
    [12] 5 illustrates a non-linear watermark embedding effect.
    [13] 6 is a schematic diagram showing another embodiment of an apparatus for embedding a watermark in an information signal;
    [5] It is an object of the present invention to provide a general method and apparatus for detecting by embedding a watermark in signals of any bit and arbitrary speed.
    [6] This is accomplished by a method and apparatus for detecting by embedding a watermark in an information signal as defined in the independent claims. Advantageous embodiments are defined in the dependent claims.
    [7] According to the present invention, a standard watermark inserter developed for multi-bit PCM signals can be used for any form of signal representation even if the watermark is not directly available.
    [14] 2 illustrates an apparatus for embedding a watermark in an information signal according to the present invention. The input signal X is a high quality digital audio signal with multi-bit samples (eg 24 bits / sample) at a high sample rate fs2 (eg 96 Hz). It is assumed that the watermark to be inserted is not usable by itself. Instead, a watermark inserter 101 is available that can handle low quality signal representations, such as conventional CD quality (16-bit samples at 44.1 ms).
    [15] The high quality signal X is converted by the sample rate converter 102 to a low sample rate fs2 (44.1 Hz). The converted signal X 'is supplied to the watermark inserter 101. For simplicity, watermark embedding is shown as a simple addition of the watermark WM to the digital signal X 'in the time domain. However, inserter 101 may be any watermark inserter that uses other techniques, such as time warping or insertion in the frequency domain.
    [16] The output Y 'of the watermark inserter 101 includes a watermark WM. The watermark is then retrieved in the fs2 area. In the present embodiment, this subtracts the non-watermarked signal X 'from the watermarked signal Y' in the fs3 region before up-sampling 104 the watermark WM 'retrieved into the fs2 region. By 103. Alternatively, subtraction may be performed in the fs2 region. In this case, the watermarked signal Y 'is first up-sampled and the input signal X is subtracted therefrom. Any compensation 105 may be necessary to minimize the errors. The compensation circuit 105 can include delay circuits, filters, and scalers. After delaying the input signal appropriately in the delay circuit 108, the retrieved and up-sampled watermark WM " is scaled 106 and then inserted into the signal X 107. In this embodiment The insertion of the watermark 107 is represented by an adder More generally, the insertion operation 107 is complementary to the retrieval operation 103.
    [17] 3 shows an apparatus for extracting a watermark according to the present invention. The apparatus comprises a sample rate converter 201 which converts the sample rate fs2 of the watermarked signal Z into a sample rate fs3, and a conventional watermark capable of processing signals at this sample rate fs3. Detector 202. Therefore, any known watermark detector 202 for standard multi-bit PCM signals (e.g. 16 bit / sample, 441 ms) may be used as arbitrary-bit arbitrary-rate signals. It can be used for watermark extraction in.
    [18] 4 shows an apparatus for embedding a watermark (WM) in high quality unit bit coded signals. Unit-bit coded signals are high rates of signals in which amplitude resolution is exchanged for time resolution. Such are usually obtained by (sigma) delta modulation. An example is a DSD (1 bit samples at 64x44.1 ms) recorded on a super audio CD. Unit bit coded signals require a different watermark inserter and detector than PCM signals. The present invention allows the conventional PCM watermark inserter 101 and the detector 202 to easily insert and extract a watermark in the DSD signal.
    [19] The apparatus includes a converter 110 that converts a single bit coded signal X to an appropriate intermediate sampling frequency fs2 to maintain high quality (eg, 24 bits / samples at 128 Hz). The multi-bit signal is then watermarked in the manner described above with reference to FIG. After the insertion process, the watermarked multiple bit signal Y " is converted back to the unit bit coded watermarked signal Y by a converter 120 (e.g., a sigma delta modulator). As shown in FIG. Note that converter 102 may convert unit bit coded signal X (fs1) directly to low sample rate signal X ′ (fs3), rather than fs2 to fs3.
    [20] It is necessary to normalize the power of the watermarked output signal. In the case of DSD signals, such normalization is preferably performed prior to the conversion 120 from the multi-bit PCM to the unit bit DSD.
    [21] The corresponding watermark detector is as described above with reference to FIG. 3, and the converter 201 receives a unit bit coded signal at a bit rate fs1.
    [22] It is also noted that the sample rate frequencies fs1, fs2 and fs3 are preferably fs1 and fs2, which are integer multiples of fs3.
    [23] The modification circuit 105 will now be described. The circuit is not necessary at all for additional watermarks. However, the conventional watermark inserter 101 includes nonlinear operations of the watermarking process. Eventually, two such nonlinear operations will be described and the effect on the final DSD stream will be described.
    [24] Example 1.
    [25] Simply adding the watermark WM to the PCM signal X 'will lead to a signal Y' = X '+ WM. If the powers of the signal X 'and the watermark WM are represented by Px' and Pw, respectively, the power Py 'of the signal Y' is equal to Py '= Px' + Pw. Since most existing inserters 101 scale the power of the watermarked signal to be equal to the input signal power, the watermarked signal Y 'is similar to the following;
    [26]
    [27] Now, by generating an estimate WM 'of the watermark signal WM by subtracting X' from Y ', the following can be obtained;
    [28]
    [29] The watermark power can actually easily increase to 10% of the total signal power. This means that the estimate WM 'of the watermark signal comprises 5% of the PCM signal X'. It is a proven fact that the signal quality of DSD is usually PC4.1 higher than 44.1GHz or even 96kHz. Therefore, a low quality replica of the signal should be avoided from entering the DSD output stream.
    [30] Example 2.
    [31] Another linear operation that is often used is time-shift. It is assumed that the watermark signal WM is inserted by delaying the signal over a specific (already defined) time T, resulting in a watermark signal Y '. After subtracting the watermark signal Y 'from the signal X', the effect on the estimated watermark WM 'is a single with frequency ω from the Fourier decomposition of the signal X'. If you look at the sine wave, it can be easily understood. In such a case,
    [32]
    [33] Where s is the time shift introduced.
    [34] For watermark estimation (WM '),
    [35]
    [36] This is a 90 ° phase shifted PCM replica of the original PCM signal (X '). This is shown graphically in FIG. 5 and the subtraction result 53 of the sine 51 and its time shift change 52 is shown. The figure shows that the signal WM 'includes a large fraction of the PCM signal X', even for a small movement s. As in the previous example, the result of inserting the signal WM 'into the DSD stream causes substantial degradation of the DSD signal with the PCM quality signal that should be avoided if possible.
    [37] The purpose of the compensating circuit 105 is to generate the tracking value WM 'of the smallest watermark signal as possible. For this purpose, the compensation circuit comprises a scaler having a scaling factor s and a time delay d. It is relatively easy to extract the time function and scaling factor to be applied. Least square error minimization strategies known in the art can be used for this purpose. For the example described above, this is the case in Example 1 that the compensation circuit 105 applies the scaling factor so that the threshold WM 'is not degraded by the original signal X, and in the case of Example 2, Compensating circuitry means introducing a phase shift that makes the estimate WM 'very small. Now, since these seem to be quite easy to extract and the PCM degradation of the DSD signal appears to be significantly reduced, it is realistic to extract the scaling and delays of the compensation. Note that there is no major limitation on other (eg, non-linear) operations that can be extracted at the compensation stage.
    [38] In particular, it is possible that one or more parameters in the time shift can be an integer parameter of the insertion process 101. In such a case, for the detector to operate correctly, it is necessary to apply the same parameters to the insertion process in the fs2 region. For this purpose, another embodiment of the inserter is shown in FIG. 6, where the compensation circuit 105 dynamically controls the delay 108 and gains 106 and / or 109 dynamically in accordance with the extracted parameters. do. In this case it should be noted that compensation is a dynamic process. The extracted parameters are slow but can change over time scale of the music.
    [39] In brief, the preferred embodiment shown in FIG. 6 is:
    [40] Extracting any (nonlinear) operations performed by the PCM inserter,
    [41] Determining the remainder WM 'after removal of these operations,
    [42] Adding the remainder (WM ') to the DSD stream, and
    [43] Execute (nonlinear) operations in the DSD region.
    [44] The present invention is summarized as follows. A high quality signal, such as a unit bit coded (DSD) audio signal having a 2.822 MHz bit rate fs1, is converted by the sample rate converter 102 into a lower sample rate fs3 PCM signal. The watermark is inserted at the low sample rate by a conventional watermark inserter 101 capable of processing signals at this low rate. The watermark WM cannot be used in any other way. It is then retrieved and subsampled to an intermediate sample rate fs2 by subtracting the non-watermarked signal from the watermarked signal (104). The DSD signal is converted into a PCM signal at the intermediate sample rate. The retrieved watermark is then added to the PCM signal (107) and the watermarked PCM signal is converted back to a unit bit coded DSD signal (120).
    [45] In a preferred embodiment, the apparatus compensates for compensating the information signal X 'for any (eg, non-linear) operations performed by inserter 101 to minimize the estimated watermark WM'. Circuit 105. The compensation circuit reintroduces the operations in the DSD area by controlling parameters such as scaling 106 and 109 and time shift 108.
    权利要求:
    Claims (13)
    [1" claim-type="Currently amended] A method of embedding a watermark (WM) in an information signal (X) having a first sampling frequency (fs2),
    Sample rate converting the information signal at a predetermined second sampling frequency fs3 (102),
    Inserting a watermark (WM) into the converted signal (X ') at the second sampling frequency (fs3) (101),
    Retrieving (103, 104) a watermark WM " at the first sampling frequency fs2 from the watermarked signal Y '; and
    Embedding said retrieved watermark (WM ") in the information signal (X) at the first sampling frequency.
    [2" claim-type="Currently amended] The method of claim 1,
    The retrieving step includes subtracting an information signal from the watermarked signal at the second sampling frequency fs3 (103), and converting the retrieved watermark at the first sampling frequency fs2 into a sample rate ( 104) comprising a watermark embedding method.
    [3" claim-type="Currently amended] And said retrieving step further comprises compensating a sample rate conversion information signal (X ′) for non-additional operations performed by said embedding step (101).
    [4" claim-type="Currently amended] The method of claim 1,
    Detecting the non-additional operations performed by the embedding step (101) and causing the information signal to operate with the non-additional operations (106, 108, 109).
    [5" claim-type="Currently amended] The method of claim 1,
    The retrieving step includes a sample rate for converting the watermarked signal Y 'to the first sampling frequency fs2 and subtracting the information signal from the watermarked signal at the first sampling frequency fs2. , How to insert a watermark.
    [6" claim-type="Currently amended] A method of embedding a watermark (WM) in a unit bit coded information signal (X) at a given bit rate fs1,
    Converting the unit bit coded signal into a multi-bit information signal at the first sampling frequency fs2;
    Embedding the watermark in a multi-bit information signal according to the method as claimed in claim 1, 2 or 3 (101-107), and
    Converting (120) the watermarked multi-bit signal back into a unit bit representation at a given bit rate fs1.
    [7" claim-type="Currently amended] The method of claim 6,
    And a sample rate converting (102) of said information signal to said second sampling frequency (fs3) is applied to a unit bit coded information signal.
    [8" claim-type="Currently amended] A method for detecting a watermark (WM) in an estimated information signal (Z) sampled at a first sampling frequency (fs2),
    Converting the estimated signal to a predetermined second sampling frequency fs3 (201),
    Detecting (202) a watermark in the converted estimated signal using a watermark detector arranged to detect the watermark in the signal sampled at the second sampling frequency fs3. Way.
    [9" claim-type="Currently amended] The method of claim 8,
    And the estimated information signal (Z) is a unit bit coded at a given bit rate fs1.
    [10" claim-type="Currently amended] In the arrangement for embedding the watermark WM in the information signal X having the first sampling frequency fs2,
    A sample rate converter 102 for converting the information signal at a predetermined second sampling frequency fs3,
    A watermark inserter 101 for embedding the watermark WM into the converted signal X 'at the second sampling frequency fs3;
    Means (103, 104) for retrieving said watermark (WM ") at said first sampling frequency (fs2) from said watermarked signal (Y '), and
    Means (107) for embedding said retrieved watermark (WM ") in said information signal (X) at said first sampling frequency.
    [11" claim-type="Currently amended] In the arrangement for embedding the watermark WM in the unit bit coded information signal X at a given bit rate fs1,
    A converter 110 for converting the unit bit coded signal into a multi-bit information signal at the first sampling frequency fs2;
    An arrangement as claimed in claim 8 for embedding the watermark in the multi-bit information signal, and
    And a converter (120) for converting the watermarked multi-bit signal back into a unit bit representation at the given bit rate fs1.
    [12" claim-type="Currently amended] In the arrangement for detecting the watermark WM in the estimated information signal Z sampled at the first sampling frequency fs2,
    Means 201 for converting the estimated signal at a predetermined second sampling frequency fs3,
    Means for detecting the watermark in the converted estimated signal using a watermark detector arranged to detect a watermark in the signal sampled at the second sampling frequency fs3, watermark detection arrangement .
    [13" claim-type="Currently amended] The method of claim 10,
    And the estimated information signal (Z) is a unit bit coded at a given bit rate fs1.
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    同族专利:
    公开号 | 公开日
    WO2001091120A1|2001-11-29|
    US20010055408A1|2001-12-27|
    JP2003534579A|2003-11-18|
    US6690812B2|2004-02-10|
    CN1381048A|2002-11-20|
    CN1237536C|2006-01-18|
    EP1292945A1|2003-03-19|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2000-05-22|Priority to EP00201770.5
    2000-05-22|Priority to EP00201770
    2000-06-14|Priority to EP00202066
    2000-06-14|Priority to EP00202066.7
    2001-05-01|Application filed by 요트.게.아. 롤페즈, 코닌클리케 필립스 일렉트로닉스 엔.브이.
    2001-05-01|Priority to PCT/EP2001/004931
    2002-05-23|Publication of KR20020038699A
    优先权:
    申请号 | 申请日 | 专利标题
    EP00201770.5|2000-05-22|
    EP00201770|2000-05-22|
    EP00202066|2000-06-14|
    EP00202066.7|2000-06-14|
    PCT/EP2001/004931|WO2001091120A1|2000-05-22|2001-05-01|Watermark insertion and extraction|
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