• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The invention relates to a semiconductor-on-insulator substrate (1) for use in RF applications, in particular a silicon-on-insulator substrate, comprising a semiconductor top layer (11), an oxide layer buried (9) and a passivation layer (7) on a silicon support substrate (3) and a corresponding method. The invention also relates to an RF device (17). In addition, a penetration layer (5) is introduced between the passivation layer (7) and the silicon support substrate (3) to provide a high resistivity of underlying RF characteristics while maintaining dislocation movements. in the support substrate (3) weak.
    公开号:FR3049763A1
    申请号:FR1652782
    申请日:2016-03-31
    公开日:2017-10-06
    发明作者:Arnaud Castex；Oleg Kononchuk
    申请人:Soitec SA；
    IPC主号:
    专利说明:

    The invention relates to a semiconductor on insulator substrate for use in RF applications, in particular a silicon on insulator substrate, comprising a semiconductor top layer, a layer of buried oxide and a passivation layer on a silicon support substrate and a corresponding method. The invention also relates to an RF device.
    Known substrates for radio frequency (RF) applications include a three-layer structure of silicon Si on silicon dioxide SiOa, in turn on a polycrystalline Si layer. This three-layer structure is provided on a solid high-resistivity support substrate with a low interstitial oxygen content ("weak Oi"). For such a substrate, the interstitial oxygen content is in a range of 5 to 10 ppb instead of 20 to 25 ppb for standard Oi substrates or 25 to 30 ppb for high Oi substrates. In this context, high resistivity typically refers to resistivity values of 3000 Dm or more. This overall high resistivity is required in RF devices to limit or suppress spurious signals from all materials under the active device, also referred to as substrate losses.
    The polycrystalline Si layer is necessary to suppress other parasitic losses that may occur due to surface charges that exist at the interface between the support substrate and the silicon dioxide layer under the influence of a field. electric. This polycrystalline Si layer acts as a passivation layer and can therefore reduce signal losses. Interstitial oxygen is known to produce thermal donors as a result of heat treatments and thus decreases the overall resistivity of the support substrate thereby increasing substrate losses, hence the need for a weak Oi substrate. The use of weak Oi is, however, not without drawbacks.
    Low Oi content makes the silicon more sensitive to dislocation migration. Interstitial oxygen atoms tend to bind to silicon atoms and aggregate to a small SiO2 precipitate that prevents dislocation from migrating into the crystal lattice. With a low Oi content, there are fewer SiOg precipitates present in the material, which leads to an increase in dislocation migration during a heat treatment during the fabrication of the semiconductor on insulator substrate and or RF devices leading to undesirable modification of the crystal structure and the appearance of so-called slip lines. Migration of dislocations can also lead to plastic deformation of the substrate, which, during CMOS processing, can lead to recovery problems during lithography.
    An object of the present invention is therefore to provide an improved semiconductor-on-insulator substrate suitable for RF applications that overcomes or at least reduces the previously identified problems.
    This objective is achieved with a semiconductor-on-insulator substrate according to the invention, in particular a silicon-on-insulator substrate, comprising a semiconductor top layer, a buried oxide layer and a passivation layer on a substrate. silicon carrier, characterized in that a penetration layer is provided between the passivation layer and the silicon support substrate, wherein the penetration layer is a higher resistivity silicon layer and with an oxygen content lower interstitial with respect to the silicon support substrate.
    According to the invention, a specific layer, the penetration layer with a low Oi content, is introduced so that a support substrate can be used, in which the sliding line and overlap problem can be reduced by decreasing the ability of dislocations to migrate within the support substrate. Indeed, the low Oi content is only needed to a certain depth, starting from the silicon layer, depending on how far an RF signal of an RF device that will be prepared on the substrate will enter the semiconductor substrate on insulator.
    According to one embodiment, the passivation layer and the penetration layer may be of the same material. In this case, the negative impacts of the mismatch at the interface can be reduced or even eliminated.
    According to one embodiment, the passivation layer may be a polycrystalline layer and the penetration layer may be a monocrystalline material. The polycrystalline layer acts as a trap for the charges and allows a reduction in parasitic losses, while the monocrystalline layer has the advantage that layers with a low surface roughness can be obtained regardless of the thickness of the layer.
    According to one variant, the penetration layer may be a polycrystalline layer. In this case, the polycrystalline layer is provided with sufficient thickness to fulfill both roles, reducing surface-related parasitic losses and substrate losses.
    According to one embodiment of the invention, a low interstitial oxygen content may refer to a concentration of less than 15 ppma, in particular between 5 and 10 ppma. In this concentration range, the level of the desired resistivity can be achieved in the passivation layer to reduce substrate losses. In addition, the term high resistivity may refer to a resistivity of 2000 μm or more, in particular 3000 μm or more, even after heat treatments lasting at least 1 hour at temperatures above 450 ° C. It should be understood that other impurities which normally influence the electrical behavior of silicon, also known as donors and acceptors, have a concentration of less than 1 × 10 -4 cm -1 in order to obtain the relationship between the oxygen content interstitial and the level of resistivity.
    According to one embodiment, the passivation layer and the penetration layer have a combined thickness of about 3 μm to 30 μm, in particular from 4 μm to 10 μm, still more particularly about 5 μm. Compared to prior art semiconductor-on-insulator substrates with low-Si silicon support substrates having a typical thickness of 725 μm, only a thin portion of the semiconductor-on-insulator substrate will be migrated. of dislocations in areas with low Oi. Thus, the subsequent lithography steps of a device can be simplified. The object of the invention is also achieved with a radio frequency (RF) device. The RF device according to the invention comprises electrically isolated device structures, in particular conductive lines within a device can be electrically insulated from each other, having a minimum distance d between them provided on and / or in a substrate semiconductor on insulator as described above and which is characterized in that the thickness of the buried oxide layer, the passivation layer and the penetration layer taken together is such that RF signals penetrate at most in the penetration layer. Thus, by adjusting the thickness of the penetration layer to the particular dimension d of the RF design, substrate losses can be reduced while manufacturability, particularly with respect to overlap during lithography, can be maintained high. .
    According to one embodiment of the invention, the thickness of the buried oxide layer, the passivation layer and the penetration layer taken together may be such that it does not exceed ten times, in particular 5 times, the distance d. The object of the invention is also achieved with the method of manufacturing a semiconductor-on-insulator substrate as described above, wherein the penetration layer is epitaxially grown on the support substrate and the upper semiconductor layer and the buried oxide layer are transferred to the passivation layer by a layer transfer method, in particular comprising a bonding method. Preferably, both the passivation layer and the penetration layer are obtained by epitaxial growth. The objective is further achieved with an alternative method of manufacturing a semiconductor-on-insulator substrate as described above, wherein the penetration layer is transferred to the support substrate by a layer transfer method. , in particular a binding method. This could be done, for example, by bonding the support substrate and the weak Oi substrate, then etching back the substrate at Oi to the desired thickness, or applying a SmartCut® type process including the steps of forming a predetermined separation zone within the substrate to Oi, bond the substrate to Oi to the support substrate and detach the residue from the substrate at Oi, p. ex. by a heat treatment, to obtain the penetration layer on the support substrate.
    With the methods mentioned above, the advantageous substrates can be obtained. The object of the invention is also achieved with a method of manufacturing a radio frequency device as described above and comprising the steps of: providing a plurality of semiconductor on insulator substrates with different thicknesses of the penetration layer, forming radio frequency devices on or in semiconductor-on-insulator substrates, determining the penetration depth of the RF signals in the plurality of semiconductor-on-insulator substrates, selecting the semiconductor substrate on insulation with the thickness of the penetration layer for which the RF signal penetrates at most into the penetration layer. In this way, an optimized penetration layer thickness can be determined so that the manufacturability is optimized while maintaining the RF devices in working order.
    Additional benefits and advantages of the disclosed embodiments will become apparent from the description and drawings. The benefits and / or benefits can be achieved individually by the various embodiments and features of the description and drawings, which need not all be provided to achieve one or more of these benefits and / or benefits.
    The above objectives and features as well as other objects and features of the present invention will become more apparent from the following description and preferred embodiments given in connection with the accompanying drawings, in which:
    Figure 1 illustrates a first embodiment of the semiconductor-on-insulator substrate according to the invention.
    Figure 2 illustrates a second embodiment of the semiconductor-on-insulator substrate according to the invention.
    Figure 3 illustrates a third embodiment of the invention, namely an RF device on a semiconductor-on-insulator substrate according to the invention.
    Figure 4 illustrates a fourth embodiment of the invention, namely a method of manufacturing a semiconductor on insulator substrate according to the invention.
    Figure 5 illustrates a fifth embodiment of the invention, namely an alternative method of manufacturing a semiconductor on insulator substrate according to the invention.
    The Figure illustrates a sixth embodiment of the invention, namely a method for selecting the thickness of the penetration layer of a semiconductor-on-insulator substrate according to the invention.
    Figure 1 schematically illustrates a semiconductor-on-insulator substrate (Sol substrate) 1 according to a first embodiment of the invention. The Sol substrate 1 according to this embodiment is intended for use as a starting material for the manufacture of radio frequency (RF) devices, e.g. ex. used in communication devices, such as mobile phones, smartphones, tablets or personal computers.
    The substrate Sol 1 comprises a silicon support substrate 3, a penetration layer 5, a passivation layer 7, a buried oxide layer 9 and a semiconductor top layer 11.
    The silicon support substrate 3 is a standard silicon (Si) substrate or Si wafer, with a standard resistivity of 15 μm, an interstitial oxygen content of about 20 to 25 ppma, and a thickness of the order of 700 to 750 pm. The buried oxide layer 7, also called box layer, in this embodiment, is a layer of silicon dioxide (SiOa) with a typical thickness of 100 to 1000 nm. The semiconductor layer in this embodiment is a silicon layer with a thickness of about 50 nm to 200 nm.
    The penetration layer 5 and the passivation layer 7 are sandwiched between the Si substrate 3 and the buried oxide layer 9.
    In this embodiment, the penetration layer 5 in this embodiment is a silicon layer with a high resistivity layer, with a resistivity value of 2000 μm or more, in particular a layer of 3000 μm or more, and a low interstitial oxygen content refers to an interstitial oxygen concentration of less than 15 ppma, in particular 5 to 10 ppma. As already mentioned above, such a resistivity value is maintained even after a heat treatment of at least 1 hour at a temperature above 450 ° C. According to the invention, the penetration layer 5 therefore has a higher resistivity and a lower interstitial oxygen content than the silicon support substrate 3. The penetration layer 5 in this embodiment is a monocrystalline layer.
    The passivation layer 7 in this embodiment is a polycrystalline Si layer with a typical thickness of about 200 to 2500 nm.
    The Sol substrate is of particular interest for RF applications. A problem associated with RF devices is the occurrence of signal losses. The passivation layer 7 and the penetration layer 5 are introduced into the structure of the substrate Sol to reduce losses. Spurious losses occur when a signal passes through a signal line of an RF device present in or on the Si layer. Spurious signals pass through the buried oxide layer in the Si substrate and can reach other signal lines of the RF device. The corresponding losses are called substrate losses.
    To reduce the losses, the penetration layer 5 is a high resistance layer with a low Oi content, and therefore with a much higher resistance than a standard Si substrate with normal Oi. Due to the high strength, losses can be reduced.
    In addition, losses that may occur due to the accumulation of surface charges on the surface of the penetration layer 5 are reduced by the presence of the polycrystalline passivation layer 7 preventing the contribution of such surface charges to conduction. thus reducing signal losses due to surface charges.
    By combining a low Oi penetration layer with a standard Si 3 substrate with a normal Oi concentration instead of using only a weak Si substrate with Oi as in the prior art, it becomes possible to reduce the occurrence of unwanted slip lines and migration of dislocations with a negative impact on the production yield. The thickness of the buried oxide layer 9, the passivation layer 7 and the penetration layer 5 are thus chosen so that the spurious signals originating from the signal passing through an RF design reach at most the penetration layer 5. and therefore do not "see" the lower resistance in the standard Si 3 support substrate. Therefore, the layers taken together have a combined thickness of at least 3 μm and at most 30 μm, in particular at most 10 μm, more particularly at most 5 μm.
    At the same time, a standard Si 3 substrate can be used, which allows RF device factories to use standard CMOS manufacturing processes.
    Figure 2 schematically illustrates a semiconductor-on-insulator substrate (Sol substrate) 13 according to a second embodiment of the invention. Features of the second embodiment which are the same as in the first embodiment bear the same reference sign, and reference is made to their description above.
    The difference between the second and the first embodiment is that, in the Sol substrate 14 of the second embodiment, the passivation layer and the penetration layer are made of the same material, namely silicon, and have the same structure. crystalline, namely a polycrystalline structure. They therefore form a modified passivation layer with a thickness that goes well beyond the thickness of the passivation layers in the prior art.
    Figure 3 schematically illustrates a radio frequency (RF) device 17 according to a third embodiment of the invention. The RF device 17 is arranged on or in the Sol substrate 1, in particular in the Si layer 11 as shown in FIG. 1. Features of the third embodiment which are the same as in the first and second embodiments are the same reference sign and reference is made to their description above. Alternatively, the Sol substrate 13 as shown in Figure 2 could be used.
    The RF device 17 comprises a plurality of electrically isolated device structures 19a, 19b, 19c with a minimum distance d between two structures, here 19a, 19b. When an RF signal passes through the device structure 19b, spurious signals 21 pass through the substrate Sol. According to the invention, their impact is reduced by the penetration layer 5 and the passivation layer 7 as explained in detail above with respect to the first and second embodiments.
    According to this embodiment of the invention, the thickness of is chosen so that it does not exceed by ten times, in particular by five times, the distance d of the RF device 17. In this case, the signals RF parasites 21 can only reach the penetration layer 5 with its higher resistivity and do not pass through the Si 3 support substrate which is better conductor.
    Figure 4 illustrates a fourth embodiment of the invention, namely a first method of manufacturing a semiconductor on insulator substrate according to the first or second embodiment of the invention. Again, features of the fourth embodiment which are the same as in the first to third embodiments bear the same reference sign, and reference is made to their description above. Step a) consists in providing a standard Si 3 substrate with a normal interstitial oxygen (Oi) content of about 20 to 25 ppma. This type of substrate is commonly used in the semiconductor industry.
    During step b) a monocrystalline Si layer, the penetration layer 5 is first obtained by homo-epitaxial growth on the support substrate in Si 3. The growth conditions are chosen so that a Oi content of less than 5 ppma oxygen concentration is achieved. A higher resistivity of at least 2000 μm or more, in particular 3000 μm, can thus be obtained with respect to the Si 3 support substrate obtained in the epitaxial layer. Following the epitaxial growth, the growth conditions are changed to then obtain a polycrystalline layer corresponding to the passivation layer 7. The thickness of the two layers 5 and 7 is determined according to the parameters described above in which relates to embodiments 1 to 3 for producing the thickness of layers 5, 7 and 9.
    Alternatively, step b) could be replaced by step b ') during which the modified passivation layer 15, fulfilling the role of both the penetration layer 5 and the passivation layer 7 in At the same time, it is grown as a polycrystalline layer directly on the Si support substrate 3. Step c) consists in the preparation of a donor substrate 23 comprising a silicon donor substrate 25 with a layer of carbon dioxide. silicon 27 and a predetermined separation zone 29 in the Si donor substrate 25, p. ex. performed by ion implantation as is known in the art.
    During step d), the donor substrate 23 is attached, e.g. ex. by bonding through the surface of the silicon dioxide layer 27 to the surface of the passivation layer 7 in the first alternative or to the modified passivation layer 15 in the second alternative.
    During step e), a detachment treatment, e.g. ex. a heat treatment is performed to effect a detachment at the predetermined separation zone 29 to thereby transfer an Si 31 layer of the Si donor substrate 23 and the silicon dioxide layer 27 to the passivation layer 7 in the first alternative or on the modified passivation layer 15 in the second alternative. The layer 27 thus corresponds to the buried oxide layer 9 and the layer 31 to the upper semiconductor layer of the first and second embodiments.
    Using this method, the Sol substrate 1 according to the first embodiment or the Sol substrate 13 according to the second embodiment can be obtained. This substrate can then be used for the manufacture of RF devices, e.g. ex. using CMOS process steps.
    Figure 5 illustrates a fifth embodiment of the invention, namely an alternative method of manufacturing a semiconductor on insulator substrate according to the invention. The method illustrated in Figure 5 is suitable for manufacturing a substrate Sol 1 according to the first embodiment. Features of the fifth embodiment which are the same as in the first embodiment and in the method according to the fourth embodiment bear the same reference sign and reference is made to their description above. Step a) consists in providing a standard Si 3 support substrate, e.g. ex. a Si wafer, and therefore with a normal interstitial oxygen content and normal resistivity and to provide a low interstitial oxygen-content Si 33 substrate, e.g. ex. a weak Si-Oi wafer, having an Oi content of 5 to 10 ppma and a resistivity greater than 2000 Dm, in particular greater than 3000 Cm. Step b) consists of attaching, p. ex. by bonding the Si 3 support substrate to the weak Si substrate at 33.
    During step c), the weak Si substrate 33 is etched back to obtain a penetration layer of desired thickness as described above. Step d) then consists in growing the polycrystalline Si passivation layer 7 above the penetration layer 5, typically with a thickness of 200 to 2500 nm.
    According to an alternative, in the case where the low interstitial oxygen content of the Si 33 substrate is of a polycrystalline nature, the etching of step c) can be used to obtain a modified passivation layer fulfilling the role of the passivation 7 and penetration layer 5 at the same time. In this alternative, step d) is then not performed. Step e) comprises preparing a donor substrate 23 comprising an Si donor substrate with a silicon dioxide layer 27 and a predetermined separation zone 29 in the donor substrate 25 Si, p. ex. performed by ion implantation as is known in the art.
    During step f), the donor substrate 23 is attached, e.g. ex. by bonding through the surface of the silicon dioxide layer 27 to the surface of the passivation layer 7.
    During step g) detachment processing, e.g. ex. a heat treatment, is performed to obtain a detachment at the predetermined separation zone 29 to thereby transfer an Si layer 31 of the Si donor substrate 23 and the silicon dioxide layer 27 on the passivation layer 7. The layer 27 corresponds to the buried oxide layer 9 and the layer 31 to the upper semiconductor layer 11 of the first. A substrate Sol 1 according to the first embodiment is thus obtained.
    Figure 6 illustrates a sixth embodiment of the invention, namely a method for selecting the thickness of the penetration layer of a semiconductor-on-insulator substrate according to the invention. The choice depends on the RF devices to be manufactured on or in the substrate Sol 1, 13 according to the invention. The reference signs used in the following relate to the characteristics already described above and bearing the same reference sign.
    The first step a) consists in providing a plurality of semiconductor-on-insulator substrates 1 with different thicknesses of the penetration layer 5. The thicknesses are chosen so that the entire thickness of the oxide layer 9 of the passivation layer 7 and the penetration layer 5 taken together remains in a range of between about 3 μm and up to about 30 μm. This also applies to the substrate Sol 13 according to the second embodiment and for the modified passivation layer 15. In the following step b), radio frequency devices, such as the RF device 17, are formed on or in the substrates For each of the various substrates Sol with different thicknesses of the penetration layer 5, the same RF devices 17 will be manufactured using the same manufacturing method.
    Subsequently during step c), the penetration depth of the parasitic RF signals is determined by determining the spurious signal in neighboring RF device structures, e.g. ex. 19a or 19c in the case where the reference passes only through the structure 19b. Alternatively, the attenuation of the spurious signal can also be determined.
    Finally, according to step d), the semiconductor on insulator substrate 1 or 13 with the thickness of the penetration layer 5 (or the modified passivation layer 15) for which the parasitic RF signal penetrates at most in the penetration layer 5 (or in the modified passivation layer 15) is chosen. Of the Sol 1 or 13 substrates satisfying the condition, the one with the thinnest penetration layer 5 (or the thinnest modified passivation layer) is the one with optimized thickness parameters. Following this feedback loop, the mass production of Sol 1 or 13 substrates with an optimized thickness of the penetration layer 5 or the modified passivation layer 15 can then be started.
    In the above embodiments, the semiconductor layer 11 was made of silicon and the buried oxide layer of SiO 2. In accordance with other variations, other suitable materials, such as SiGe or GaAs, may also be used. Instead of the polycrystalline Si, other charge trapping layers could also be used for the passivation layer 7.
    权利要求:
    Claims (12)
    [1" id="c-fr-0001]
    A semiconductor-on-insulator substrate, in particular a silicon-on-insulator substrate, comprising a semiconductor top layer (11), a buried oxide layer (9) and a passivation layer (7) on a substrate. silicon carrier (3), characterized in that a penetration layer (5) is provided between the passivation layer (7) and the silicon support substrate (3), wherein the penetration layer (5) is a higher resistivity silicon layer with a lower interstitial oxygen content than the silicon support substrate (3).
    [2" id="c-fr-0002]
    The semiconductor-on-insulator substrate of claim 1, wherein the passivation layer (5) and the penetration layer (7) are of the same material.
    [3" id="c-fr-0003]
    The semiconductor-on-insulator substrate of claim 1 or 2, wherein the passivation layer (7) is a polycrystalline layer and the penetration layer (5) is a monocrystalline material.
    [4" id="c-fr-0004]
    The semiconductor-on-insulator substrate according to any one of claims 1 or 2, wherein the penetration layer (13) is a polycrystalline layer.
    [5" id="c-fr-0005]
    The semiconductor-on-insulator substrate according to any one of claims 1 to 4, wherein a low interstitial oxygen content refers to a concentration of less than 15 ppma, in particular 5 to 10 ppma.
    [6" id="c-fr-0006]
    The semiconductor-on-insulator substrate according to any one of claims 1 to 5, wherein the term high resistivity refers to a resistivity of 2000 μm or more, in particular 3000 μm or more.
    [7" id="c-fr-0007]
    The semiconductor-on-insulator substrate according to any one of claims 1 to 6, wherein the buried oxide layer (9), the passivation layer (7) and the penetration layer (5) have a thickness combined with 3 μηι at 30 μηι, in particular from 4 μηι to 10 μηι, more particularly in particular of approximately 5 μm.
    [8" id="c-fr-0008]
    A radio frequency device with electrically isolated device structures (19a, 19b, 19c) having a minimum distance d between them provided on and / or in a semiconductor-on-insulator substrate according to any one of claims 1 to 6, characterized in that the thickness (d ') of the buried oxide layer (9), the passivation layer (7) and the penetration layer (5) taken together is such that RF signals penetrate at most in the penetration layer (5).
    [9" id="c-fr-0009]
    The radio frequency device according to claim 8, wherein the thickness of the buried oxide layer (9), the passivation layer (7) and the penetration layer (5) taken together is such that it not exceed ten times, especially five times, the distance d.
    [10" id="c-fr-0010]
    A method of manufacturing a semiconductor-on-insulator substrate according to any one of claims 1 to 7, wherein the penetration layer is epitaxially grown on the support substrate and the semiconductor top layer and the buried oxide layer is transferred to the passivation layer by a layer transfer method, in particular comprising a bonding method.
    [11" id="c-fr-0011]
    A method of manufacturing a semiconductor-on-insulator substrate according to any one of claims 1 to 7, wherein the penetration layer is transferred to the support substrate by a layer transfer method, particularly a binding method.
    [12" id="c-fr-0012]
    A method of manufacturing a radio frequency device according to any one of claims 8 and 9, comprising the steps of: - providing a plurality of semiconductor on insulator substrates with different thicknesses of the penetration layer - formation of radio frequency devices on or in semiconductor on insulator substrates - determination of the penetration depth of RF signals in the plurality of semiconductor on insulator substrates - choice of semiconductor on insulator substrate with the thickness of the penetration layer for which the RF signal penetrates at most into the penetration layer.
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    优先权:
    申请号 | 申请日 | 专利标题
    FR1652782|2016-03-31|
    FR1652782A|FR3049763B1|2016-03-31|2016-03-31|SEMICONDUCTOR SUBSTRATE ON INSULATION FOR RF APPLICATIONS|FR1652782A| FR3049763B1|2016-03-31|2016-03-31|SEMICONDUCTOR SUBSTRATE ON INSULATION FOR RF APPLICATIONS|
    TW106109658A| TWI720161B|2016-03-31|2017-03-23|Semiconductor on insulator substrate for rf applications|
    CN201780026817.8A| CN109075120A|2016-03-31|2017-03-30|Semiconductor-on-insulator substrate for RF application|
    PCT/EP2017/057614| WO2017167923A1|2016-03-31|2017-03-30|Semiconductor on insulator substrate for rf applications|
    DE112017001617.7T| DE112017001617T5|2016-03-31|2017-03-30|Semiconductor-on-insulator substrate for RF applications|
    US16/090,349| US10886162B2|2016-03-31|2017-03-30|Semiconductor-on-insulator substrate for RF applications|
    JP2018550442A| JP6657516B2|2016-03-31|2017-03-30|Semiconductor on insulator substrate for RF applications|
    KR1020187030528A| KR102172705B1|2016-03-31|2017-03-30|Semiconductor on insulator substrates for RF applications|
    US17/090,608| US20210057269A1|2016-03-31|2020-11-05|Semiconductor-on-insulator substate for rf applications|
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