• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    The invention relates to a resistive random access memory device comprising: a first electrode of inert material; a second electrode of soluble material; a solid electrolyte comprising a region made of an oxide of a first metallic element, called a "first metal oxide" doped by a second element, distinct from the first metal and capable of forming a second oxide, said second element being chosen so that the forbidden band energy of the second oxide is strictly greater than the forbidden band energy of the first metal oxide, the atomic percentage of the second element within the region of the solid electrolyte being between 5% and 20%.
    公开号:FR3022393A1
    申请号:FR1455286
    申请日:2014-06-11
    公开日:2015-12-18
    发明作者:Gabriel Molas；Philippe Blaise；Faiz Dahmani；Elisa Vianello
    申请人:Commissariat a lEnergie Atomique CEA；Altis Semiconductor SNC；Commissariat a lEnergie Atomique et aux Energies Alternatives CEA；
    IPC主号:
    专利说明:

    [0001] TECHNICAL FIELD OF THE INVENTION The present invention relates to the field of non-volatile rewritable memories, and more specifically that of resistive random access memories. A resistive random access memory comprises first and second electrodes separated by a layer of electrically insulating material, and switches from an insulating state to a conductive state by forming a conductive filament between the first and second electrodes. BACKGROUND OF THE INVENTION Random access memories (called RRAM memories for "Resistive Random Access Memories" in English) are today the subject of great attention, in particular because of their low power consumption and their high operating speed. A resistive type of memory cell has at least two states: a highly resistive state "HRS" ("High Resistance State"), also called "OFF" state, and a weakly resistive state "LRS" ("Low Resistance State") or ON state. It can therefore be used to store binary information. Three types of resistive memories can be distinguished: thermochemical mechanism-based memories, valence-based memories, and electrochemical metallization-based memories. The field of the present invention relates more particularly to this last category based on ionically conductive materials (CBRAM memories or "Conductive Bridging RAM"). The operation resides in the reversible formation and breaking of a conductive filament in a solid electrolyte by dissolving a soluble electrode. These memories are promising because of their low programming voltages (of the order of Volt), their short programming time (<1 ps), their low power consumption and their low integration cost. In addition, these memories can be integrated in the metallization levels of the logic of a circuit ("above IC"), which makes it possible to increase the integration density of the circuit. From the point of view of architecture, they require only a selection device, a transistor or a diode, for example. The operation of the CBRAM memories is based on the formation, within a solid electrolyte, of one or more metal filaments (also called "dendrites") between two electrodes, when these electrodes are brought to appropriate potentials. The formation of the filament makes it possible to obtain a given electrical conduction between the two electrodes. By modifying the potentials applied to the electrodes, it is possible to modify the distribution of the filament, and thus to modify the electrical conduction between the two electrodes. For example, by reversing the potential between the electrodes, it is possible to remove or reduce the metal filament, so as to remove or greatly reduce the electrical conduction due to the presence of the filament. FIGS. 1A and 1B are schematic diagrams of a memory device 1 of the CBRAM type, respectively in the "OFF" state and in the "ON" state. This device 1 is formed by a stack of the type Metal / ionic conductor / metal. It comprises a solid electrolyte 2, for example based on doped chalcogenide (eg GeS) or oxide (eg A1203). The electrolyte 2 is disposed between a lower electrode 3, for example Pt, forming an inert cathode, and an upper electrode 4 comprising a portion of ionizable metal, for example copper, and forming an anode. A portion of ionizable metal is a portion of metal capable of forming metal ions (here Cu2 + ions), when subjected to a suitable electrical potential. The device 1 shown in FIG. 1A or 1B typically forms a memory point, that is to say a unitary memory cell, of a memory comprising a multitude of these memory devices.
    [0002] As indicated above, the memory state of a CBRAM memory device results from the difference in electrical resistivity between two states: "ON" and "OFF".
    [0003] In the "OFF" state (FIG. 1A), the metal ions (in this case the Cu2 + ions for a soluble electrode comprising Cu) originating from the ionizable metal portion are dispersed throughout the solid electrolyte 2. Thus, no contact electrical connection is established between the cathode 3 and the anode 4, that is to say between the upper electrode and the lower electrode. The solid electrolyte comprises an electrically insulating zone of high resistivity between the anode and the cathode. When a positive V potential is applied to the upper soluble electrode 4 (the anode), an oxidation-reduction reaction takes place at this electrode, creating mobile ions 5 (Fig.1A). In the case of a copper electrode 4, the following reaction takes place: Cu -> Cu 2 + + 2 e-. The ions 5 then move in the electrolyte 2 under the effect of the electric field applied to the electrodes. The rate of displacement depends on the mobility of the ion in the electrolyte in question, which guides the choice of the soluble electrode / electrolyte couple (examples: Ag / GeS, Cu / Al 2 O 3, etc.). The rates of displacement of the ions are of the order of nm / ns.
    [0004] Arrived at the inert electrode 3 (the cathode), the ions 5 are reduced by the presence of electrons provided by the electrode 3, resulting in the growth of a metal filament 6 according to the following reaction: Cu 2 + + 2 e- -> Cu The filament 6 increases preferentially in the direction of the soluble electrode 4.30 The memory 1 then goes into the "ON" state (FIG. 1B) when the filament 6 allows the contact between the electrodes 3 and 4, making the conductive stack. This phase is called "SET" of memory.
    [0005] To go to the "OFF" state ("RESET" phase of the memory), a negative voltage V is applied to the upper electrode 4, causing the conductive filament to dissolve. To justify this dissolution, thermal (heating) and oxidation-reduction mechanisms are generally invoked. More specifically, the step of writing for the first time the memory 1, that is to say to form for the first time the filament 6 in the electrolyte 2 of the memory 1, is called "forming". Thus, "SET" is understood to mean the step of forming the filament 6 made after at least a first erasure of the memory cell, that is to say after the filament of the memory cell has at least been formed a first time (forming step) then dissolved (RESET step). Often, the electrolyte 2 contains in the "OFF" state a residual filament 6 in contact with the cathode 3. This comes from the previous SET phase and was not completely dissolved during the RESET memory. The filament is said to be residual when it does not establish sufficient electrical conduction between the electrodes to obtain the "ON" state. A development path for the CBRAM memories concerns the widening of the memory window; the latter is defined by the ratio between the resistances of the insulating states "OFF" and passing "ON", that is to say the ratio Roff / Ron. The higher this ratio, the easier it is to distinguish between the two logic states "OFF" and "ON" of the CBRAM memory. A wide window even allows to consider multi-bit coding, that is to say to obtain more than two states with a single memory cell using several levels (ie at least 3) of resistance.30 SUMMARY OF The invention aims to provide a solution to the problems mentioned above by proposing a CBRAM memory cell based on metal oxide with improved electrical performance, and in particular with a high memory window. A first aspect of the invention therefore relates to a resistive random access memory device comprising: a first electrode of inert material; a second electrode of soluble material; a solid electrolyte, the first and second electrodes respectively being in contact with one of the faces of the electrolyte on either side of the said electrolyte, the second electrode being capable of supplying mobile ions circulating in the solid electrolyte towards the first electrode for forming a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes; the solid electrolyte comprising a region made of an oxide of a first metal element, called "first metal oxide" and said region being doped by a second element, distinct from the first metal and capable of forming a second oxide, said second element being chosen so that the forbidden band energy of the second oxide is strictly greater than the forbidden band energy of the first metal oxide, the atomic percentage of the second element within the region of the solid electrolyte being between 5% and 20%.
    [0006] The term "gap energy", or "gap", of a material, the width of the forbidden band of said material, that is to say the difference in energy between the minimum of the conduction band and the maximum of the valence band.
    [0007] The invention advantageously makes it possible to contribute to the increase of the memory window by using a doping of the MOx metal oxide electrolyte (for example a gadolinium oxide GdOx, with a composition that may be Gd203) by a second element (preferably metal). D (for example Al aluminum) chosen so that the forbidden band energy of the oxide DOx is strictly greater than the band gap energy Mo x. To achieve this result, the atomic percentage of the second element D within the region of the doped solid electrolyte is between 5% and 20%. Thanks to the invention, this enlargement of the memory window is also not at the expense of other electrical performance of the memory such as forming voltage or retention.
    [0008] Thus, one of the difficulties of CBRAMs based on metal oxide concerns the difficulty of forming the filament in the electrolyte during the first use of the memory, that is to say during the forming step. This step consists in applying a voltage across the memory, called the "forming voltage", necessary for the formation of the filament in the electrolyte during the first use of the CBRAM memory cell. Doping by the second metal D such as aluminum can have two opposite effects; this doping makes it possible on the one hand to contribute to the creation of a plurality of oxygen vacancies in the electrolyte, and particularly in the region of the first metal oxide electrolyte doped with the second metal D. This plurality of gaps of oxygen makes it easier to move the mobile ions, and thus the formation of the conductive filament. This contributes to reducing the forming voltage, that is to say the voltage to be applied between the soluble electrode and the inert electrode to allow the formation of the conductive filament during the forming step. Conversely, by doping the electrolyte too much, one takes the risk of approaching an alloy (for example an alloy Gd2_yAly03); in this case, replacing the electrolyte with a ternary alloy, one moves away from the properties of Gd203 to get closer to those of A1203 and the tension of forming will be increased insofar as the A1203 presents a tension of forming intrinsically (ie, all technological features such as the Gd203 and Al203 deposition method being the same) higher than that of Gd203. In order to maintain a reduced forming voltage (or at least to keep a forming voltage close to that of the material of the undoped electrolyte, for example Gd203), it is advisable to choose the ad hoc atomic percentage for the second metal D at the same time. within the region of the doped solid electrolyte; a percentage between 5% and 20% can respond effectively to these two opposite effects. Another difficulty of the metal oxide CBRAM memories relates to the retention of information, that is to say the retention of the "OFF" state and the "ON" state. It is sought to improve the stability of the insulating and conductive states, especially for high operating temperatures. It is considered that there is a fault in retention when the memory cell loses the information, this loss being defined on the basis of a predetermined criterion; for example, in the initial state (t = 0), i.e. immediately after applying the write operation, the resistance RoN of the memory in the "ON" state is minimal. Then, over time, the resistance in the ON state increases. The predetermined criterion consists for example in defining a resistance threshold beyond which it is considered that the retention of information is no longer ensured. From this threshold, we consider that the memory is in a state of failure. For example, it may be considered that the information in the memory cell is lost when its resistance has increased by a factor of 2 with respect to its initial RON resistance just after programming (t = 0). As mentioned above, doping with the second metal D contributes to the creation of a plurality of oxygen vacancies in the electrolyte; the introduction of oxygen vacancies in the electrolyte has the consequence of degrading the retention; indeed the oxygen vacancies offer privileged diffusion sites for the atoms (for example of Cu) constituting the filament. The dissolution of the filament is accelerated. It is therefore necessary to introduce enough dopants not to degrade the retention; a percentage of between 5% and 20% makes it possible to limit this degradation, or even to maintain a retention substantially identical to that obtained with the material of the undoped electrolyte.
    [0009] In addition to the features that have just been mentioned in the preceding paragraph, the device according to one aspect of the invention may have one or more additional characteristics among the following, considered individually or in any technically possible combination: the second element is chosen so that the electrical permittivity of the doped region material is less than or equal to the electrical permittivity of the first metal oxide; thus, the permittivity of Gd203: Al (Gd203 doped with AI) is lower than the permittivity of undoped Gd203; the second element is chosen so that the electrical permittivity of the second oxide is strictly less than the electrical permittivity of the first metal oxide; this embodiment covers the case where the second element locally creates a material (for example a material of the AlOx type in the case of doping with AI) in the first oxide (for example Gd203), that is to say the case where the material is not totally mixed after doping; the second element is a metal distinct from the first metal and capable of forming a second metal oxide; said second element is chosen so that the first metal oxide doped by the second element has a band gap energy substantially equal to the forbidden band energy of the first undoped metal oxide by the second element; we mean by two substantially equal energies two energies equal to +/- 200 meV; the atomic percentage of the second element within the region of the solid electrolyte is substantially equal to 10%; the first metal oxide is gadolinium oxide and the second element is aluminum; according to a first variant, the solid electrolyte comprises: a first sub-layer in contact with the first electrode of inert material, and a second sub-layer in contact with the second electrode of soluble material, the region of the solid electrolyte first metal oxide doped by the second element being a central sub-layer between the first and second sub-layers; in a second variant, the solid electrolyte comprises: a first sublayer in contact with the first electrode of inert material, and a second sublayer in contact with the second electrode of soluble material, an underlayer central between the first and second sub-layers; the region of the solid electrolyte first metal oxide doped by the second element being the first sub-layer and / or the second sub-layer; in a third variant, the solid electrolyte is entirely formed by the first metal oxide region doped by the second element; said second element is chosen so that the length of the bond between the second element and the oxygen is less than the length of the bond between the first metal and the oxygen. The invention and its various applications will be better understood by reading the following description and examining the figures that accompany it. BRIEF DESCRIPTION OF THE FIGURES The figures are presented for information only and in no way limitative of the invention. FIG. 1 schematically illustrates the transition from an "OFF" state to an "ON" state for a CBRAM memory device; FIG. 2 illustrates the evolution of the "OFF" resistance of a CBRAM memory cell for different atomic percentages of second doping metal within the region of the solid electrolyte; FIG. 3 schematically shows the structure of an oxide-based CBRAM memory cell according to one embodiment of the invention; FIG. 4 schematically shows the structure of an oxide-based CBRAM memory cell according to a variant of the embodiment of the invention of FIG.
    [0010] DETAILED DESCRIPTION OF AT LEAST ONE EMBODIMENT OF THE INVENTION Unless otherwise specified, the same element appearing in different figures has a unique reference.
    [0011] In the present description, the term "CBRAM memory cell based on oxide" a CBRAM memory cell comprising an electrolyte made based on a metal oxide. As mentioned above, the invention advantageously makes it possible to contribute to the increase of the memory window by using a doping of the MOx metal oxide electrolyte (for example a gadolinium oxide GdOx such as Gd203) by a second element (preferably metallic , for example aluminum Al) chosen so that the forbidden band energy of the oxide DOx is strictly greater than the forbidden band energy of the oxide M0x. To achieve this result, the atomic percentage of the second element D within the region of the doped solid electrolyte is between 5% and 20%. An example of a CBRAM memory cell 10 according to the invention is illustrated in FIG.
    [0012] The memory cell 10 comprises: a first electrode 11, also called a cathode or inert electrode thereafter; a solid electrolyte 12. The solid electrolyte 12 comprises an oxide region of a first metal, called a "first metal oxide", said region being doped with a second metal, distinct from the first metal and capable of forming a second metal oxide. . The second metal is chosen so that the band gap energy of the second metal oxide is strictly greater than the forbidden band energy of the first metal oxide and the atomic percentage of the second metal within the region of the solid electrolyte. is between 5% and 20%; a second electrode 17, also called anode or soluble electrode thereafter, and comprising an ion source layer 13 and a metal line 14. When a voltage is applied between the inert electrode 11 and the metal line 14 of the soluble electrode 17, the ion source layer 13 provides mobile ions 15 which flow in the solid electrolyte 12 to the inert electrode 11 to form a conductive filament between the inert electrode 11 and the soluble electrode 17 According to the first embodiment illustrated in FIG. 3, the inert electrode 11 is a pad, for example made from an inert interconnection metal, such as tungsten W, titanium nitride TiN or tantalum nitride TaN. According to the first embodiment illustrated in FIG. 3, the ion source layer 13 of the soluble electrode 17 is made from a Cu copper alloy and from a member of the chalcogen family such as You. The ion source layer 13 of the soluble electrode 17 can therefore be made from CuTe. More generally, the ion source layer 13 can be made from Cu copper and its alloys, Ag silver and its alloys, zinc Zn and its alloys, a copper alloy and / or zinc and / or silver, such as: AgCu, AgZn, CuZn, AgCuZn, and its alloys. According to a particularly advantageous embodiment illustrated in FIG. 3, the solid electrolyte 12 is made of gadolinium oxide Gd203 and the second doping metal is aluminum Al with an atomic percentage chosen so that the first metal oxide doped with the second metal (ie Gd203: A1) has a band gap energy substantially equal to the band gap energy of the first undoped metal oxide (ie Gd203) to 200 meV close. An atomic percentage of Al substantially equal to 10% advantageously responds to this latter constraint and makes it possible to obtain the desired effect on the memory window without degrading the forming voltage and the retention.
    [0013] The effect of the introduction of doping metal into the electrolyte on the memory window is particularly illustrated in FIG. 2 which represents the evolution of the value of the resistor RoFF in the "OFF" state as a function of the voltage of erase (ie the RESET voltage). Three curves (i.e., three evolutions of resistance) are represented for three doping levels: - atomic percentage of 20% of Al in the electrolyte in Gd203; - Atomic percentage of 10% Al in the electrolyte Gd203; - atomic percentage of 0% Al (i.e. undoped reference sample) in the Gd203 electrolyte; FIG. 2 also schematically represents the value of the resistance in the "ON" state; it will be noted that this resistance RoN hardly changes once the threshold of the voltage of SET is exceeded; the atomic percentage of Al in the electrolyte also has little effect on the value of RoN which remains substantially constant at 104 ohms. On the contrary, we observe that the RoFF value is much more dependent on the technology used. The higher the RESET voltage, the higher the RoFF value, and therefore the higher the memory window.
    [0014] The invention is based on the observation that the behavior of the resistor RoFF as a function of the RESET voltage is not the same as the atomic percentage of dopant in the electrolyte. It is observed firstly that the resistance RoFF is higher when the electrolyte is effectively doped with a second metal (i.e. with respect to the undoped reference sample); this phenomenon can be explained by the fact that a metallic doping element has been chosen in which the associated metal oxide (in this case A1203) has a higher window than that of the electrolyte material (ie Gd203) . Beyond this first observation linked to doping, the applicant has also observed that the atomic percentage of doping also has an effect on the value of the memory window. Thus, a doping level of 10% makes it possible to obtain a memory window wider than a doping level of 20%.
    [0015] Once observed this particularly advantageous effect on the memory window, it should also ensure that the doping will not degrade other electrical characteristics of the memory, including the forming voltage and retention. To do this, the memory according to the invention has an atomic percentage of optimized metal dopant of between 5 and 20%, it being understood that a percentage substantially equal to 10% represents a particularly advantageous embodiment (significant improvement of the memory window without degradation of the forming voltage and the retention).
    [0016] With regard to the retention, according to an advantageous embodiment, the metal dopant can be chosen so that the bond between dopant D (for illustrative purposes Al) and oxygen (bond D-0) is smaller than that of Gd-0: such a choice makes it possible to preserve or improve retention. In this case, the A1-0 bond has a length of 1.8A while the Gd-0 bond has a length of 2.2A. The preferred example of Gd203 doped with 10% Al is not limiting; several variants are possible for the pair formed by the electrolyte material and the dopant, among which: a gadolinium oxide Gd203 doped for example with Si (here the second doping element is not metallic but semiconductor), , B, Mg, Ca or Sr; an aluminum oxide A1203 doped with Si; a hafnium oxide HfO 2 doped with Al or Si; a zirconium oxide ZrO 2 doped with Hf, Gd, Al or Si; a titanium oxide TiO 2 doped with Zr, Hf, Gd, Al or Si.
    [0017] The doped region of the solid electrolyte 12 may for example be made by copulating a first metal oxide target and a second metal target. In particular, it is possible to measure the atomic percentage of the second doping metal within the doped region of the solid electrolyte 12 by a Rutherford backscattering spectroscopy (RBS) technique (Rutherford Backscattering Spectroscopy). FIG. 4 illustrates a second variant of a memory cell 10 according to the invention in which the doped region of the solid electrolyte 12 is a central sub-layer 12-c of the solid electrolyte 12, the atomic percentage of the Al aluminum in the central sub-layer 12-c being substantially equal to 10%. The central underlayer 12-c of the solid electrolyte 12 is between first and second sub-layers 12-1 and 12-2 of the solid electrolyte 12, the first underlayer 12-1 being in contact with the solid electrolyte 12. the inert electrode 11, and the second sub-layer 12-2 being in contact with the ion source layer 13.
    权利要求:
    Claims (11)
    [0001]
    REVENDICATIONS1. Resistive random access memory device (10) comprising: - a first electrode (11) of inert material; a second electrode (17) of soluble material; a solid electrolyte (12), the first and second electrodes (11, 17) being respectively in contact with one of the faces of the electrolyte (12) on either side of said electrolyte, the second electrode (17) being capable of supplying mobile ions (15) flowing in the solid electrolyte (12) to the first electrode (11) to form a conductive filament between the first and second electrodes when a voltage is applied between the first and second electrodes; said device (10) being characterized in that the solid electrolyte (12) comprises a region made of an oxide of a first metallic element, called "first metal oxide" and in that said region is doped by a second element, distinct from the first metal and capable of forming a second oxide, said second element being chosen so that the band gap energy of the second oxide is strictly greater than the band gap energy of the first metal oxide, the atomic percentage of the second element within the region of the solid electrolyte (12) being between 5% and 20%.
    [0002]
    2. Device according to claim 1 characterized in that the second element is chosen so that the electrical permittivity of the material of the doped region is less than or equal to the electrical permittivity of the first metal oxide.
    [0003]
    3. Device according to claim 1 characterized in that the second element is chosen so that the electrical permittivity of the second oxide is strictly less than the electrical permittivity of the first metal oxide.
    [0004]
    4. Device (10) according to one of the preceding claims characterized in that the second element is a metal distinct from the first metal and capable of forming a second metal oxide.
    [0005]
    5. Device (10) according to one of the preceding claims characterized in that said second element is chosen so that the first metal oxide doped by the second element has a band gap energy substantially equal to the energy bandgap of the first undoped metal oxide by the second element.
    [0006]
    6. Device (10) according to one of the preceding claims characterized in that the atomic percentage of the second element within the solid electrolyte region (12) is substantially equal to 10%.
    [0007]
    7. Device (10) according to one of the preceding claims characterized in that the first metal oxide is gadolinium oxide and in that the second element is aluminum.
    [0008]
    8. Device (10) according to any one of the preceding claims characterized in that the solid electrolyte (12) comprises: - a first sub-layer (12-1) in contact with the first electrode (11) of inert material and a second underlayer (12-2) in contact with the second electrode (17) of soluble material; the region of the solid electrolyte (12) first metal oxide doped by the second element being a central sub-layer (12-c) between the first and second sub-layers (12-1, 12-2).
    [0009]
    9. Device (10) according to any one of the preceding claims characterized in that the solid electrolyte comprises: - a first sub-layer in contact with the first electrode of inert material, and- a second sub-layer in contact with the second electrode of soluble material; a central sub-layer comprised between the first and second sub-layers; the region of the solid electrolyte first doped metal oxide by the second element being the first sub-layer and / or the second sub-layer.
    [0010]
    10. Device (10) according to any one of claims 1 to 7 characterized in that the solid electrolyte (12) is entirely formed by the first metal oxide region doped by the second element.
    [0011]
    11. Device (10) according to one of the preceding claims characterized in that said second element is chosen so that the length of the connection between the second element and the oxygen is less than the length of the connection between the first element metallic and oxygen.
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    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    US20070120124A1|2005-11-30|2007-05-31|I-Wei Chen|Resistance-switching oxide thin film devices|
    US20140103284A1|2012-02-07|2014-04-17|Intermolecular Inc.|ReRAM Cells Including TaXSiYN Embedded Resistors|
    FR3003401A1|2013-03-15|2014-09-19|Altis Semiconductor Snc|MICROELECTRONIC DEVICE WITH PROGRAMMABLE MEMORY|
    US7772581B2|2006-09-11|2010-08-10|Macronix International Co., Ltd.|Memory device having wide area phase change element and small electrode contact area|
    JP2011124511A|2009-12-14|2011-06-23|Sony Corp|Storage element and storage device|
    JP2013016530A|2011-06-30|2013-01-24|Sony Corp|Memory element, method for manufacturing the same, and memory device|
    US20130082232A1|2011-09-30|2013-04-04|Unity Semiconductor Corporation|Multi Layered Conductive Metal Oxide Structures And Methods For Facilitating Enhanced Performance Characteristics Of Two Terminal Memory Cells|
    US20130082228A1|2011-09-30|2013-04-04|Unity Semiconductor Corporation|Memory Device Using Multiple Tunnel Oxide Layers|
    US8941089B2|2012-02-22|2015-01-27|Adesto Technologies Corporation|Resistive switching devices and methods of formation thereof|TWI564898B|2015-10-26|2017-01-01|國立中山大學|Resistance random access memory|
    EP3249706B1|2016-05-25|2020-03-18|IMEC vzw|A rare-earth metal oxide resistive random access non-volatile memory device|
    US20170346005A1|2016-05-26|2017-11-30|Imec Vzw|Rare-Earth Metal Oxide Resistive Random Access Non-Volatile Memory Device|
    WO2018004625A1|2016-06-30|2018-01-04|Intel Corporation|Conductive bridge random access memorydevices with engineered sidewalls for filament localization|
    US11018295B2|2016-11-14|2021-05-25|Hefei Reliance Memory Limited|Non-volatile memory structure with positioned doping|
    CN110140172A|2016-11-14|2019-08-16|合肥睿科微电子有限公司|Reduce the RRAM process integration scheme and cellular construction of mask operation number|
    FR3061799B1|2017-01-06|2020-06-19|Commissariat A L'energie Atomique Et Aux Energies Alternatives|METHOD FOR DETERMINING A MEMORY WINDOW FROM A RESISTIVE VIVE MEMORY|
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    优先权:
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    EP15171196.7A| EP2955717A1|2014-06-11|2015-06-09|Resistive random access memory device|
    US14/736,858| US9722177B2|2014-06-11|2015-06-11|Resistive random access memory device with a solid electrolyte including a region made of a first metal oxide and doped by a second element distinct from the first metal|
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