APPARATUS, METHOD, AND PROGRAM FOR PROCESSING INFORMATION

专利摘要:
The present invention relates to an information processing apparatus which comprises a free page storage unit and a page allocation unit. The free page storage unit divides a memory region into a page memory of a plurality of different page sizes and manages the divided pages, and stores management information on an initialization state corresponding to a region of unused memory in the memory. The page allocation unit selects a free page of a page size according to a requested region size or a requested page size from the free page storage unit when an allocation of the page size is requested. unused memory region is requested, and performs an initialization process on a memory region on which the initialization process was not performed in a memory region corresponding to the free page using management information on the free page selected.
公开号:FR3017222A1
申请号:FR1463490
申请日:2014-12-31
公开日:2015-08-07
发明作者:Takayuki Okamoto
申请人:Fujitsu Ltd；
IPC主号:

专利说明:

[0001] FIELD The present invention relates to an information processing apparatus, a control method executed by an information processing apparatus, and a control program for an information processing apparatus. BACKGROUND A processor that executes an operating system (OS) implemented for a computer reallocates a freed memory region after executing a previous process or task as a memory memory region for use in a memory region. running a new process or task that works with the OS. Prior to performing the reallocation of such a memory region, the memory region is reset to prevent the leakage of information about the previous process or task left in the memory region to be reallocated. However, there may be a case where initialization is not desired in the memory allocation in the OS kernel, or a case where a freed memory region is not used in the memory allocation. Running a new process in a specified valid time, such as a period of time until a power supply to a computer is turned off, even if the freed memory region has been initialized. Next, to control the unwanted initialization execution, the reset of a memory region can be performed when the reallocation of a memory region is requested. In the OS executed by a processor, the memory region in memory is managed by dividing it into page units, i.e., in units of size (region size) of memory regions. consecutive specified. The size of a page managed by the OS can be 4 Kbytes or 8 Kbytes. Recently, depending on the type of OS or process or task performed under the control of the OS, a page whose size is larger than a normal size of 4 Kbytes or 8 Kbytes, for example a 30 page in units of Mbytes, was used. In the following explanation, a page of normal size such as 4 Kbytes or 8 Kbytes is referred to as the normal page for convenience, and a page larger than the normal size is called large page for convenience. When a memory region in memory is managed using a large page, the number of pages requested to use a memory of the same size is smaller than in the case where a normal page is used, so as to reduce costs. page management. Therefore, when a large page is used in managing the memory region in the memory, an occurrence of malfunctions such as a Translation Lookaside Buffer (TLB) may be reduced, and the performance of the application may be reduced. improved. However, when a large single-sized page is used in managing the memory region in memory, the actual available amount of memory can be reduced. For example, if a 64 kbyte program is executed in the event that a memory region in the memory is managed using a large 4 MByte page, then it becomes necessary to allocate a 4 MByte memory region for page for program execution, even though the program size is only 64 Kbytes. Therefore, the memory can be more effectively used if pages of different sizes are available depending on the use. One method of effectively managing memory blocks of different sizes can be a companion system, which is used in a Linux kernel and elsewhere. In the companion system, a plurality of consecutive pages are combined with larger pages, and a large page is divided into smaller pages, so as to variably control a page size. By performing combining and dividing pages, a memory region of an appropriate region size is allocated based on the process or task being executed. The following page allocation system is known. With respect to the memory maintained in a page unit, an insecure page for which data leakage is necessary is detected when a page acquisition request is issued by an application when a page is released from the application, or when data is defined for a page from the application that has secured a page. Then, only the unsecured page detected is initialized. In addition, the following memory allocation system is known. A system load monitor mechanism monitors the state of charge of a computer system, and when it determines that the system load is low, it activates a page zeroing mechanism. The page zeroing mechanism extracts from a group of free pages a page to be allocated to the next request, resets the content, and transfers the page to a group of pages that are set to zero. When the page zeroing mechanism determines that a zeroed page is requested, it returns to a requester the page retrieved from the set page group prepared by the page zeroing mechanism. In addition, the following microprocessor system is known. A microprocessor specifies the head address and the size to be initialized in the memory. A DMA controller initializes the memory by transferring the initialization data to all the addresses to be initialized in the memory having the specified head address and size. When the memory is initialized by the DMA transfer, the bit width of the initialization data output from the initialization data register is extended in the expansion circuit of the bit money, and transferred to the memory 20 via a data bus. [Patent Documents] Patent Document 1 Japanese Patent Publication Laid-Open No. 2006-48436 Patent Document 2 Japanese Patent Publication Laid-open No. 11-3271 Patent Document 3 Japanese Patent Publication Laid-Open No. 200625 215991 SUMMARY One of the problems to be solved by the invention is to perform the process of high speed allocation of an initialized memory region according to the size specified by a memory acquisition requester in a processing apparatus. information that manages memory regions in memory by using pages of different sizes. According to one aspect of the embodiments, an information processing apparatus comprises a free page storage unit and a page allocation unit. The free page storage unit divides a memory region into a page memory of a plurality of different page sizes and manages the divided pages, and stores management information on an initialization state corresponding to a region of unused memory in the memory. The page allocation unit selects a free page of a page size according to a requested region size or a requested page size from the free page storage unit when an allocation of the region of unused memory is requested, and performs an initialization process on a memory region on which the initialization process was not performed in a memory region corresponding to the free page using management information on the free page selected. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a functional configuration of an exemplary computer system comprising an information processing apparatus according to one embodiment; Figure 2 is a schematic view of an exemplary page structure according to one embodiment; Fig. 3 is an example of a free-page management list according to one embodiment; Fig. 4 is a hardware configuration of an exemplary computer system comprising an information processing apparatus according to one embodiment; Fig. 5 is an exemplary block diagram of a zeroing process performed by a reset unit; Fig. 6 is an exemplary block diagram of a memory allocation process performed by a page allocation unit; Fig. 7 is an exemplary block diagram of a process of updating the management information associated with a division process; FIG. 8 is a first explanatory view of a process for updating the management information associated with a division process; Fig. 9 is a second explanatory view of a process of updating the management information associated with a division process; Fig. 10 is an exemplary block diagram of a process of updating the management information associated with a combining process; Fig. 11 is a first explanatory view of a process of updating the management information associated with a combination process; Fig. 12 is a second explanatory view of a process of updating the management information associated with a combination process; Fig. 13 is a third explanatory view of a process of updating the management information associated with a combination process; Fig. 14 is an explanatory view of a zeroing process with a first timer; and Fig. 15 is an explanatory view of a zeroing process with a second timer. BRIEF DESCRIPTION OF THE DRAWINGS The embodiment of the present invention is described below with reference to the accompanying drawings. The desired processing time for newly allocating a stored memory region to a process or task may depend on the number of pages corresponding to the region size of the memory requested to execute the process or task, and the size of the memory. region of the memory to initialize for allocation. In the case where the memory region of the memory is managed using a large page, the number of pages desired for the allocation may decrease more than in the case where the management is performed using a normal page. On the other hand, the region size of the memory to be initialized to allocate the corresponding memory region to the requested region size is the same as in the case where a normal page is used. Accordingly, in the case where the memory region in the memory is managed using a large page, the desired period for the initialization process of the memory region in the memory may be a predominant period in the desired processing time to newly allocate a memory region corresponding to 1 page to a process or task. In addition, if the initialization process on a memory region is performed on each page to be allocated when the memory region is allocated, then the time requested in a memory allocation process using a large page will be longer. that time in the event that a normal page is used. For the reason described above, when a memory region in memory is managed using a large page, this may adversely affect the performance or behavior of the total parallel computer system comprising a plurality of computing nodes, following the desired duration of time for a memory allocation process including an initialization process on the memory region. For example, the time required for the initialization process performed in the memory allocation in a compute node may be a duration equal to or greater than the communication time between the compute nodes in a computer system. In this case, if a plurality of compute nodes simultaneously perform communications via an Application Programming Interface (API) such as a Message Passing Interface (MPI), etc., a delay due to a memory initialization wait occurs in the relay operation between a part of the 25 computing nodes. The influence of the occurrence of the delay affects all computing nodes, so as to cause a delay in the entire process. In addition, in the process including inter-process communication such as the aforementioned communication between the compute nodes, the timeout period up to the response of the communication partner process can be defined taking into account the worst case. Then, the time-out period may be requested for parameterization so as to be long enough taking into account the memory initialization waiting time mentioned above. As described below in detail, an information processing apparatus according to the embodiment of the invention manages a memory region in memory using pages of a plurality of different page sizes. For example, the information processing apparatus according to the embodiment manages the initialization state (state of zeroing) of the memory region that corresponds to each page in the memory using management information of every page. The information processing apparatus according to the embodiment executes the initialization process on the memory region that corresponds to each page in the memory using management information of each page. Through the management of the initialization state mentioned above and the execution of the initialization process, the desired time to perform the initialization process on the memory region when a memory region in the memory is allocated is reduced, and the process of allocating a memory region according to the requested region size is performed at a high speed. In the following explanation, the term "zeroing" refers to the initialization. Fig. 1 is a functional configuration of an exemplary computer system comprising an information processing apparatus according to an embodiment. As illustrated in FIG. 1, a computer system 1 includes application execution computers 11-1 to 11-3 and a task management computer 12. The computer system 1 is connected to a user terminal apparatus 2 through the task management computer 12. The computer system 1 executes an application program, source code, execution binary, etc., specified by an application program processing unit. 2A of the user terminal apparatus 2. In the following explanation, unless otherwise indicated, the term "application program" refers, for the sake of convenience, to an application program, a source code, a binary of execution, etc., executed by the computer system 1 on an instruction of the user terminal apparatus 2. The task management computer 12 includes a task planner processing unit 12A. The task scheduler processing unit 12A manages a schedule to allow any of the application execution computers 11-1 to 11-3 to perform an application program task specified by the terminal apparatus user 2.
[0002] The application execution computers 11-1 to 11-3 perform respective application program tasks specified by the task management computer 12. The application execution computers 11-1 to 11-3 are computing nodes of the computer system 1, and are examples of an information processing apparatus according to the embodiment. In Figure 1, three application execution computers 11-1 to 11-3 are illustrated, but the number of application execution computers included in the computer system 1 may be optional. In the following explanation, unless otherwise indicated, the application execution computers 11-1 to 11-3 are described as an application execution computer 11.
[0003] The application execution computer 11 includes a task management unit 110, process execution units 120-1 and 120-2, and an operating system processing unit (OS) 130. In Figure 1, two process threads 120-1 and 120-2 are illustrated, but the number of process threads included in the application execution computer 11 may be optional. In the following explanation, unless otherwise indicated, the process threads 120-1 and 120-2 are described as a process thread 120. The task management unit 110 is connected to the unit. 12A, the process execution unit 120, and the OS processing unit 130. In cooperation with the task scheduler processing unit 12A, the task management unit 110 manages the entire task that is executed in the application execution computer 11 and which includes scheduling to execute a task of an application program, monitoring the execution state of a task, the transmission of the execution status of a task, etc. Task scheduler processing unit 12A and task management unit 110 configure a task scheduling system of computer system 1. Process thread 120 executes the process of an application program specified by the job management unit 110 using a memory region of the memory allocated by the OS processing unit 130. The process thread 120 executes the application program process specified by the task management unit 110 according to the schedule specified by the OS 130 processing unit. The OS processing unit 130 executes the implemented OS in the application execution computer 11. The OS processing unit 130 includes a process planner processing unit 131, a page allocation unit 132, a reset unit 133, and a free page storage unit 134. pro planner processing unit cessus 131 is connected to the task management unit 110, the process execution unit 120, and the zeroing unit 133. In cooperation with the task management unit 110, the processing unit 110 Process planner processing 131 manages the scheduling of the execution of the process of the application program by the process thread 120 and the execution of the zeroing process on a free page by the process unit. Zeroing 133. The page allocation unit 132 is connected to the process thread 120. The page allocation unit 132 receives a request to allocate a memory region in the memory from the memory. Process thread 120. The memory region allocation request may be configured to request a desired memory region size to execute the process, or to request a desired page size to execute the process. The page allocation unit 132 searches for the free page storage unit 134 for a free page of the page size corresponding to the region size of the requested memory from the process thread 120, or a free page corresponding to the requested page size from the process thread 120. The page allocation unit 132 determines whether the free page searched for was set to zero or not. When the free page searched for is or is not a page set to zero as a result of the determination, the page allocation unit 132 clears the memory region corresponding to the desired free page. The page allocation unit 132 transmits the reset memory region to the process thread 120.
[0004] The reset unit 133 is connected to the process planner processing unit 131 and the free page storage unit 134. The reset unit 133 acquires a free page in the storage unit The reset unit 133 determines whether the memory region that corresponds to the free page acquired in the memory has been set to zero or to the next page. no. When the memory region corresponding to the acquired free page is a memory region that has not been set to zero as a result of the determination, then the reset unit 133 resets the memory region that has not been set to zero. The free page storage unit 134 manages the free page corresponding to the memory region that is not used in the execution of the application program process by the process thread 120 etc., in Memory. The free page storage unit 134 includes a physical memory 1341, a page structure group 1342, and a free page management list 1343. The physical memory 1341 is a physical memory managed by dividing it into pages. of a plurality of different page sizes, and is a 20-page entity. Unless otherwise indicated, the term "memory" is synonymous with the term "physical memory". Page Structure Group 1342 is a set of page structures for managing information about a page. A page structure is defined in a page unit of the smallest page size in the multi-size pages to be managed, i.e., in a normal page unit. A normal page is a page of a size of, for example, 4 Kbytes or 8 Kbytes. Each page structure defined in a normal page unit corresponds to the memory region of an address specified in the memory. Each page structure contains information on a corresponding normal page or a large page including a corresponding normal page. That is, the information on a normal page is stored in a corresponding page structure, and the information on a large page is stored in at least one of the corresponding page structures for each of the normal pages obtained by dividing the page. a big page. Figure 2 is a schematic view of an exemplary page structure according to one embodiment. As illustrated in Fig. 2, a page structure 1342A according to the embodiment comprises a reset state bit A1, a reset state lock bit A2, a set process control bit. at zero A3, and a free page bit A4. The page structure 1342A includes a pointer A5 to the page structure on the next free page and a pointer A6 to the page structure on the previous free page. The page structure 1342A includes a reset state size A7. The reset state bit A1 is a bit indicating whether the page corresponding to the page structure 1342A (a corresponding normal page or a large page including a corresponding normal page) is a zeroed page or not. The reset state lock bit A2 is a bit on which a flag is set for the reset unit 133 to execute exclusively the reset process on the page corresponding to the page structure 1342A. The reset process control bit A3 is a bit for checking whether the reset process by the reset unit 133 on the page corresponding to the page structure 1342A is allowed or not. The free page bit A4 is a bit indicating whether or not the page corresponding to the page structure 1342A is a free page. Each of the flags A1 to A4 is, for example, one bit, and the total flag may be no more than 64 bits. The pointer A5 to the page structure on the next free page and the pointer A6 to the page structure on the previous free page are pointers to the page structure 1342A of the adjacent free page connected to the page structure 1342A in 1343. The pointer A5 to the page structure on the next free page and the pointer A6 to the page structure on the previous free page can be, for example, 64 bits. The reset state size A7 is a bit indicating the length of the consecutive zeroing state in the memory region corresponding to the page.
[0005] That is, the reset state size A7 is a bit indicating the size of the consecutive zeroed region of the page (a corresponding normal page or a large page including a corresponding normal page) corresponding to page structure 1342A. The reset state size A7 is expressed as a power of two of the page size of a normal page, e.g., 8 bits. In the information processing apparatus according to the embodiment, the process of allocating the memory region performed by the page allocation unit 132 and the process of zeroing the memory region performed by the reset unit 133 are checked using the information in the page structure 1342A. For example, using the reset state lock bit A2 and the reset process control bit A3, a check is made so that the processes by the page allocation unit 132 and the reset unit 133 is not executed simultaneously on the same free page (a memory region corresponding to the same free page). in the memory region corresponding to a free page in the memory, a memory region on which a zeroing process has not been performed, i.e. a memory region on which the process Zeroing must be done, is identified using the reset state bit A1, a free page bit A4, and a zero state size A7. The free pages management list 1343 is a list for managing a free page corresponding to an unused memory region that is not used in the execution of a process of an application program by the Process thread 120. The page allocation unit 132 and the zeroing unit 133 search for a free page and a memory region corresponding to the free page with reference to the free page management list. 1343. Figure 3 is an example of a free pages management list according to one embodiment. As illustrated in Figure 3, an entry indicating a page size such as 8 Kbytes, 16 Kbytes, 32 Kbytes, 64 Kbytes, etc., is added to the first line of the Free Pages Management List 1343, and each Free pages with different page sizes are managed in association with an entry of a corresponding page size. In the example shown in Figure 3, the size of a normal page is 8 KBytes, and the page sizes of large pages are 16 KBytes, 32 KBytes, and 64 KBytes. As indicated by the arrow illustrated in Fig. 3, the free pages for each entry are combined with each other by the aforementioned pointers A5 and A6 of the corresponding page management structures 1342A. It should be noted that FIG. 3 is only one example of the free-page management list 1343 according to the embodiment. That is, the size of a normal page can be any page size other than 8K bytes. In addition, the page size of a large page may be any page size other than 16 Kbytes, 32 Kbytes, and 64 Kbytes. The type of large page having different page sizes is not limited to these three types, but can be any type. Fig. 4 is a hardware configuration of an exemplary computer system comprising an information processing apparatus according to an embodiment. As illustrated in FIG. 4, a computer system 3 includes application execution computers 31-1 to 31-5, a task management computer 32, and an internodal connection network 33. The computer system 3 is connected to a user terminal apparatus 4 such as a computer via the task management computer 32. Although FIG. 4 illustrates five application execution computers 31-1 to 31-5, any number of application execution computers may be included in the computer system 3. In the following explanation, when the application execution computers 31-1 to 31-5 are not specifically designated, an execution computer application 31 is described. The task management computer 32 is an information processing apparatus such as a computer, and corresponds to the task management computer 12. The task scheduler processing unit 12A in the task computer Task management 12 is, for example, a central processing unit (CPU) in task management computer 32. Application execution computer 31 is an information processing apparatus such as: a computer, and corresponds to the application execution computer 11, which is an example of an information processing apparatus according to the embodiment. Each application execution computer 31 is a calculation node of the computer system 3. As illustrated in FIG. 4, the application execution computer 31 comprises CPU cores 310-1 through 310-4, level 1 (L1) caches 320-1 to 320-4, a level 2 (L2) cache 330, a main memory 340, a storage 350, a storage medium reader 360, an interconnection 370 , and a bus 380. FIG. 4 illustrates four CPU cores 310-1 through 310-4, and four level 1 caches 320-1 through 320-4 corresponding to the four CPU cores 310-1 through 310-4.
[0006] However, any number of CPU cores may be included in the application execution computer 31 and the level 1 caches corresponding to the CPU cores. In the following explanation, when the CPU cores 310-1 to 310-4 are not specifically designated, the CPU core 310 is described. When the level 1 caches 320-1 to 320-4 are not specifically designated, the level 1 cache 320 is described. The CPU core 310 is a core of a processor, and a logic circuit that performs an arithmetic process. Each CPU core 310 is connected to the corresponding level 320 cache that can be accessed at a high speed, and is connected to the level 2 cache 330 shared by a plurality of CPU cores 310.
[0007] The CPU core 310, the level 1 cache 320, and the level 2 cache 330 configure a multiprocessor. The CPU core 310, the level 1 cache 320, and the level cache 330 correspond to the task management unit 110, the process thread 120, the process planner processing unit. 131, the page allocation unit 132, and the reset unit 133.
[0008] The main memory 340 temporarily stores a program being executed and the data being processed, and is directly accessible by the CPU core 310. The main memory 340 is, for example, a Random Access Memory (RAM). The main memory 340 corresponds to the free page storage unit 134.
[0009] The storage 350 is, for example, a hard disk (HDD). The storage 350 stores a program such as an OS etc., and data. The storage medium reader 360 reads data stored in a recording medium and / or writes processed data into the application execution computer 31 in a recording medium. The recording medium can be, for example, a Compact Disk Read Only Memory (CD-ROM), a DVD (Digital Versatile Disk), a USB (Universal Serial Bus) memory, a flash memory, etc. The interconnection 370 is a communication device connected to the other node 31 and to the task management computer 32 via the internodal connection network 33.
[0010] The bus 380 interconnects a multiprocessor comprising the CPU core 310, the level 1 cache 320, and the level 2 cache 330, the main memory 340, the storage 350, the storage medium drive 360, and the interconnection 370. The bus 380 includes a memory bus which connects the multiprocessor including the CPU core 310, the level 1 cache 320, and the level 2 cache 330 to the main memory 340. The internodal connection network 33 is a cable and a switch that connects the task management computer 32 and the task management computer 32, and interconnects the application execution computers 31. Initially, the zeroing process performed by the unit resetting 133 is described. The zeroing process refers to an initialization process on the memory region corresponding to a free page in the memory. Figure 5 is an exemplary block diagram of a zeroing process performed by a zeroing unit. When the resetting unit 133 starts the resetting process in accordance with an instruction of the process planner processing unit 131 (step S1001), the resetting unit 133 refers to the resetting list 133. management of free pages 1343 so as to search for a free page not yet set to zero (step S1002). In particular, with reference to the reset state bit Al of the page structure 1342A corresponding to the free page in the free page management list 1343, the reset unit 133 searches for a free page that is not set to zero. When no non-zero free page is found ("NO" in step S1003) as a result of the search, the reset unit 133 terminates the set of zeroing processes. The reset unit 133 waits for a new instruction to execute the reset process from the process planner processing unit 131 (step S1004). When a non-zero free page is found ("YES" in step S1003) as a result of the search, the zeroing unit 133 selects a free page from the found free pages. As described above with reference to Figure 3, the Free Pages Management List 1343 is used to manage a free page for each different page size. Therefore, the free page selected by the reset unit 133 can be a normal page, a large page obtained by combining normal pages, or a large page that is obtained by combining other large pages and having a size. page is larger than the big pages to combine.
[0011] The reset unit 133 attempts to lock the entire selected free page (step S1006). In particular, the reset unit 133 attempts to set a lock flag indicating the exclusive execution of the zeroing process on the reset state lock bit A2 of the page structure 1342A corresponding to the free page selected. By executing the process in step 51006, it can be avoided that the same free page is processed by the reset unit 133 and the page allocation unit 132. When the lock on the selected full free page fails ("NO" in step S1007), the reset unit 133 returns to the process in step S1002, and again searches for a free page that has not been reset.
[0012] When the lock on the entire selected free page succeeds ("YES" in step S1007), the reset unit 133 determines whether or not there is a pending request for an allocation of the selected free page ( step S1008). In particular, the reset unit 133 determines whether or not the page allocation unit 132 sets the selected free page as a page to allocate, with reference to the reset process control bit A3 of the 1342A page structure corresponding to the selected free page. By periodically confirming the flag of the process control bit A3 in the process in step S1008, a check is made to prioritize the allocation process by the page allocation unit 132 on the process. zeroing by the reset unit 133, so as to prevent the process execution of the application program by the process thread 120, which has requested the allocation unit of page 132 to allocate memory, stagnated due to the process by the reset unit 133. When there is a pending request for an allocation of the free page selected as a result of the determination, that is that is, when a zero suspension flag process is set to the reset process control bit A3 ("NO" in step S1008), then the reset unit 133 releases the lock on the selected free page (step S1009). Next, the reset unit 133 returns to the process in step S1002, and again searches for a free page that has not been set to zero.
[0013] When there is no pending request for an allocation of the free page selected as a result of the determination, i.e., when a zero suspension flag process is not set to the reset process control bit A3 ("YES" in step S1008), then the reset unit 133 executes the process in step S1010. That is, the reset unit 133 clears the memory region, in the physical memory 1341, corresponding to a normal page that has not been set to zero in the selected page (step S1010). The reset unit 133 reflects the newly reset state on the page structure 1342A corresponding to the selected page (step S1011). In particular, the reset unit 133 sets a flag indicating the state set to zero on the reset state bit A1 of the corresponding page structure 1342A. The reset unit 133 adds a newly reset region size to the reset state size A7 of the corresponding page structure 1342A. For example, when the selected free page is a large page, the reset unit 133 sets a flag indicating the reset state for the page structure 1342A corresponding to the first normal page in the selected free page, and add a region size set to zero. In addition, the reset unit 133 may set a flag indicating the zeroed state for the page structure 1342A corresponding to the newly reset normal page, and add a region size set to zero.
[0014] When the process of resetting to a memory region corresponding to a normal page in the physical memory 1341 is completed, the zeroing unit 133 determines whether the zeroing process on the selected whole page is complete or not. (Step S1012). In particular, the reset unit 133 determines whether or not the reset state size A7 of the page structure 1342A corresponding to a first normal page in the selected free page corresponds to the page size of the page. free page selected. When it is determined that the zeroing process on the entire selected page is not completed ("NO" in step S1012), the reset unit 133 returns to the process in step S1008, and determines whether or not a request is pending allocation of the selected free page. When the zeroing process on the entire selected page is complete ("YES" in step S1012), the reset unit 133 releases the lock on the selected free page (step S1009). In particular, the reset unit 133 sets a lock release flag indicating the stop of the exclusive execution of the zeroing process by the reset unit 133 on the state lock bit A2 setting on which a lock flag defined in the process in step S1006. Then, the reset unit 133 returns to the process in step 51002 and searches again for a free page that has not been set to zero. Therefore, the set of zeroing processes is performed until there is no free page that has not been set to zero in the free pages management list 1343. Therefore, the process of resetting the memory to be requested in the process of allocating a memory region in the memory can be reduced by executing the set of zeroing processes mentioned above separately from the setting process. to zero performed in the process of allocating the memory region in the memory. Accordingly, the initialized region of memory of a suitable region size corresponding to the requested process or task can be allocated at a high speed from the memory regions in the managed memory using a plurality of sizes of memory. page. In addition, by performing a check so that the memory allocation process region can be prioritized over the set of zeroing process mentioned above, the process of setting the memory region to zero corresponding to a free page can be performed without the delay in the process of allocating a memory region that is desired to perform a process or task.
[0015] The process performed by the page allocation unit 132. The process performed by the page allocation unit 132 can be roughly divided into a memory allocation process and a release process. of memory. A memory allocation process performed by the page allocation unit 132 is first described. The memory allocation process is a process of allocating a memory region set to zero according to the region size or page size of the requested memory from the process thread 120 from the memory regions in the managed memory using pages of a plurality of different page sizes. Fig. 6 is an exemplary block diagram of a memory allocation process performed by a page allocation unit. The page allocation unit 132 receives a request to allocate a memory region in the memory, which is desired to execute a process or task, from the process thread 120, and starts the process. memory allocation process series (step S2001). A configuration is performed so that the allocation request of a memory region can be performed by requesting the desired memory region size, and by requesting a desired page size. The page allocation unit 132 searches for a free page having a page size equal to or larger than the requested memory region size from the process thread 120, or a free page having a page size. equal to or larger than the requested page size from the process thread 120 with reference to the free page management list 1343 (step S2002).
[0016] When there is no free page whose size is equal to or larger than the region size or the requested page size from the process thread 120 ("NO" in step S2020), then the page allocation unit 132 determines that there is no unused memory region having the requested region size, transmits a memory allocation error to the process thread 120, and terminates the memory allocation process series (step S2003). When a free page whose size is equal to or larger than the region size or page size requested from the process thread 120 ("YES" in step S2002), the allocation unit of page 132 determines a free page in the free pages detected as being a page to allocate. As described above with reference to Figure 3, a free page is maintained for each different page size in the free page management list 1343. Therefore, the free page determined by the page allocation unit 132 can be a normal page, a large page obtained by combining normal pages, or a large page that is obtained by additional combination of large pages and which is larger than the big page to combine. For example, the page allocation unit 132 selects a free page of the smallest size among the free pages whose size is equal to or larger than the requested region size or page size from the execution unit. process 120 from the free pages management list 1343. If the page size of the selected free page is twice as large or more than twice the requested region or page size size from the thread process 120, then the page allocation unit 132 divides the selected free page into two free pages unless the selected free page is a normal page. Then, the page allocation unit 132 selects one of the split free pages as an allocation page, and returns the other of the divided free pages to the free pages management list 1343 so that it can be handled as the size of the split page. If the page size of the free page selected as the allocation candidate page is twice as large or more than twice the requested region or page size size from the process thread 120 , then the page allocation unit 132 redivides the selected free page into two free pages. Then, the page allocation unit 132 selects one of the redivided pages as a new allocation candidate page, and returns the other free page redivoted to the free pages management list 1343 so that it can be managed as the size of the redivided page. Therefore, as long as the size of the free page selected is less than twice the requested region size or page size from the process thread 120, the page allocation unit 132 repeats the process of division mentioned above. When the size of the selected free page becomes less than twice the region size requested by the process thread 120, the page allocation unit 132 determines the free page selected as a page to be allocated. When the division process mentioned above on a free page is performed, the page allocation unit 132 performs the process of updating management information on the free page divided as management information on the state of zeroing, etc. Figure 7 is an exemplary block diagram of a process of updating the management information associated with a division process. When the page allocation unit 132 starts the updating process on the management information associated with the division process on a free page (step S3001), the page allocation unit 132 acquires the size of the page allocation unit. reset state A7 of the page structure 1342A corresponding to the free page managed by the free page management list 1343 (step S3002). For example, when a free page to be processed is a large page, the page allocation unit 132 acquires the reset state size A7 of the page structure 1342A corresponding to a normal page header in the page. big page. The page allocation unit 132 compares the zeroed region size indicated by the acquired reset state size A7 with the page size of the free page managed by the free page management list 1343 ( step S3003).
[0017] When the two sizes mutually correspond as a result of the comparison ("YES" in step S3003), the page allocation unit 132 halves the zeroed region size indicated by the update state size. at zero acquired A7. Then, the page allocation unit 132 writes the halved region size in the reset state size A7 of each page structure 1342A corresponding to the two free pages obtained by dividing the free page by the division process (step S3004). When the two sizes do not match each other as a result of the comparison (NO "in step S3003), the page allocation unit 132 maintains the reset state size A7 as the management information. on each of the two divided free pages without rewriting the reset state size A7 already stored in each page structure 1342A corresponding to each of the two divided free pages (step S3005). When the process in step S3004 or the in step S3005 is performed, the page allocation unit 132 completes the management information update process series (step S3006) When the large page selected as the allocation candidate page is redivided, the page allocation unit 132 again performs the update process series on the management information For a better understanding of the processes in the steps S3004 and S3005, the process of setting The management information associated with the division process is explained below with reference to FIGS. 8 and 9. FIG. 8 is a first explanatory view of a process for updating the management information associated with a process. division. Figure 8 exemplifies the case where a large 16 kbyte page A is divided into two normal pages of 8 kbytes B and C. In an example illustrated in Figure 8, the memory region corresponding to the large page A in the memory is fully set to zero, and "reset state = zero for 16 Kbytes" is recorded in the management information region of the main page A. In particular, in the information regions of management of the big page A, the information "reset state = zeroed" is recorded in the reset state bit A1 of the page structure 1342A corresponding to a normal page of head in the page A, that is, a first normal half-page in the big page A. The information "Zero state = 16 Kbytes" is stored in the reset state size A7 of page structure 1342A corresponding to a first normal half page in the large page A. Therefore, the management information on the big page A is recorded in the page structure 1342A corresponding to a first normal half-page in the big page A. In this way, in the process of recording the management information on a page according to the embodiment, the management information on a large page can be searched for or updated without reference to the total page structure for each normal page in the large page, so as to simplify and speed up the process of search for updating management information. In addition, regardless of the page size, the process of dividing a page accompanied by the updating of the management information can be performed. With respect to the large page A illustrated in FIG. 8, the page size (16 kbytes) of the big page A corresponds to the size of the region set to zero (16 kbytes) of the big page A. Then, in the where the big page A is divided in two, that is, the normal pages B and C, the region size in the zeroed state recorded in the management information region of the big page A, i.e., 16 Kbytes, is divided by two. Then, as shown in FIG. 8, the "zeroing state = zeroed for 8 Kbytes" information after the split-two process has been executed is recorded as management information on the divided normal pages. B and C in the respective management information regions. In particular, the information "reset state = zeroed" is stored in the reset state bit A1 of each page structure 1342A corresponding to the normal pages B and C. In addition, the information "reset state = 8 kbytes" is recorded in the reset state size A7 of each page structure 1342A corresponding to the normal pages B and C. FIG. 9 is a second explanatory view of a process of updating the management information associated with a division process. FIG. 9 illustrates the case in which the large page D having a page size of 16 Kbytes is divided into two, that is, the normal pages E and F. In the example illustrated in FIG. the memory region of a first normal half page of the large page D has been set to zero, and the memory region of a second normal half page has not been set to zero. Then, in the management information region of the big page D, "reset state = zero for 8 Kbytes" is recorded for a first half normal page, and "reset state = not set zero for 8 Kbytes "is recorded for a second normal half page. In particular, the information "Zero state = reset to 8 Kbytes" is recorded in the reset state bit A1 and the reset state size A7 of the page structure 1342A. corresponding to the first normal half page on page D. The information "Zero state = not set to zero for 8 Kbytes" is stored in the reset state bit Al and the size of reset state A7 of the page structure 1342A corresponding to the second normal half-page on the main page D. Therefore, the management information on the main page D is divided so as to be recorded and managed in the first half page. and second half normal pages. In the large page D illustrated in FIG. 9, the page size (16 Kbytes) of the big page D does not correspond to the size of the zeroed region (8 Kbytes) of the big page D. Then, in the process in step S3005 in Fig. 7, the information "reset state = set to zero for 8 Kbytes" for the first normal half page in the management information of the main page D is continuously maintained as management information on the normal page E corresponding to a first normal half-page of the big page D. In the management information on the big page D, the information "state of zeroing = not set to zero for 8 Kbytes "for a normal second half-page is maintained continuously as management information on the normal page F corresponding to the second normal half-page of the main page D. In particular, the information" status of setting zero = zero for 8 Kbytes "is continuously maintained by the d bit the zero state A1 and the reset state size A7 of the page structure 1342A corresponding to the normal page E. In addition, the information "reset state = not set to zero for 8 Kbytes "is continuously maintained by the reset state bit A1 and the reset state size A7 of the page structure 1342A corresponding to the normal page F.
[0018] In the process in step S2004 in Fig. 6 comprising the page division process mentioned above and the process of updating management information, a free page to be allocated is determined. The page allocation unit 132 requests the reset unit 133 to suspend the zeroing process on the determined free page to be allocated (step S2005). In particular, the page allocation unit 132 sets a zeroing process suspension flag on the reset process control bit A3 of the page structure 1342A corresponding to the free page to be allocated. In the process in step S2005, a check is made so that the allocation process by the page allocation unit 132 can be prioritized over the reset process by the update unit. even if the memory region corresponding to the free page to allocate is in the process of zeroing the reset unit 133. Therefore, it can be avoided that the execution of the program process of application by the process thread 120 which requests the page allocation unit 132 to allocate the memory region in the memory to be interrupted by the process of the zeroing unit 133. The page allocation unit 132 waits for the suspension of the zeroing process to be performed by the reset unit 133 on the free page to be allocated (step S2006). In particular, the page allocation unit 132 refers to the reset state lock bit A2 of the page structure 1342A corresponding to the free page to be allocated. If a lock flag is set to the referenced zero reset state lock bit A2, the page allocation unit 132 waits for the reset state lock bit A2 to change the lock flag. at the lock release flag. The lock flag designates a flag indicating the exclusive execution of the zeroing process by the reset unit 133. The lock release flag designates the flag indicating the suspension of the exclusive execution of the setting process. zero by the reset unit 133.
[0019] When the process of zeroing by the reset unit 133 on the free page to be allocated is suspended, the page allocation unit 132 reads the reset state bit A1 and the size of the reset state A7 of the page structure 1342A corresponding to the free page to be allocated. Then, the page allocation unit 132 searches, using the reset state bit Al lu and reset state size A7, the free pages to be allocated for a memory region on which the Zeroing process was not performed. In particular, the page allocation unit 132 determines whether or not a flag indicating the zeroed state is set on the reset state bit Al lu. The page allocation unit 132 also determines whether or not the page size of the free page to be allocated corresponds to the reset state size A7 read. When the flag indicating the reset state is not set to the reset state bit A1, and the page size of the free page to be allocated does not match the bet state size At zero A7 read, the page allocation unit 132 determines that there is a memory region in which the zeroing process has not been performed. Then, the page allocation unit 132 clears the memory region in which the zeroing process has not been performed (step S2007). When all the memory regions corresponding to the free page to be allocated are set to zero, the page allocation unit 132 transmits the zeroed memory region corresponding to the free page to be allocated to the execution unit. process 120 that requested the allocation (step S2008). Then, the page allocation unit 132 ends the memory allocation process series (step S2009). The memory release process executed by the page allocation unit 132 is hereinafter described. The memory release process is a process of releasing the memory region in the memory, which is released after the executing the process or task by the process thread 120 as a memory region corresponding to a free page of a specified page size in a plurality of different page sizes targeted for management. When the memory region in the memory, which has been allocated to the execution of the process or task by the process thread 120, is released, the page allocation unit 132 starts the process of releasing the process. memory. The page allocation unit 132 marks the page corresponding to the freed memory region as a free page that has not been set to zero. In particular, the page allocation unit 132 sets on the reset state bit A1 of the page structure 1342A corresponding to the released free page a flag indicating that the zeroing process has not been performed. been done. The page allocation unit 132 sets a flag indicating a free page on the free page bit A4. The page allocation unit 132 writes "0", which is a value indicating that there is no zeroed region size, on the reset state size A7. The page allocation unit 132 stores in the free page management list 1343 the page marked as a free page that has not been set to zero. In particular, the page allocation unit 132 performs the following process. As described above with reference to Fig. 3 etc., in the information processing apparatus according to the embodiment, including the application execution computer 11 by way of example, the memory regions in the memory are managed using pages having a plurality of different page sizes. Then, a companion of a free page to be stored may exist in the free pages management list 1343. A companion designates a page to combine with the current page to form a page with a page size greater than the page current. In the companion system, a companion to be a combination partner of the current page is determined in advance according to a specified combination rule. The page allocation unit 132 refers to an entry corresponding to the page size of a free page to be stored, and confirms whether or not there is a companion of the free page to be stored in the management list. free pages 1343. When there is no companion of the free page to store as a result of the confirmation, the page allocation unit 132 writes a specified value to the pointers A5 and A6 of the page structure 1342A corresponding to the free page to be stored, and stores the free page to be stored in the free pages management list 1343. When there is a companion of the free page to be stored as a result of the confirmation, the allocation unit page 132 performs a process of combining the free page to be stored with the companion of the free page to be stored. The page allocation unit 132 confirms whether or not there is a companion of the combined page in the free pages management list 1343. When there is no companion of the combined page as a result of the confirmation, the page allocation unit 132 writes a value specified in the pointers A5 and A6 of the page structure 1342A corresponding to the combined page, and stores the combined page in the free page management list 1343. When there is a companion of the combined page as a result of the confirmation, the page allocation unit 132 executes the combination process of the combined page with the companion of the combined page. Then, the page allocation unit 132 repeats the combination process mentioned above until it is confirmed that there is no companion in the free pages management list 1343. When the combination process mentioned above is performed, the page allocation unit 132 reflects the management information on the two pages combined in the management information on the combined page so as not to lose the management information. on the two pages combined. Figure 10 is an exemplary block diagram of a process of updating the management information associated with a combination process. When the process of updating the management information associated with the free page combining process is started (step S4001), the page allocation unit 132 acquires the management information on the first free half-page to be combined. (first free page) (S4002). The page allocation unit 132 also acquires the management information on the second free half-page to combine (second free page) (S4002). In the first and second free half-pages, a free page corresponds to a newly freed memory region, or a combined page obtained by combining the page corresponding to the newly freed memory region with the companion in the page management list. 1343. Another free page is a companion of the first free half-page, and exists in the free pages management list 1343. The management information acquired by the processes in steps S4002 and S4003 is the status bit. Al setting zero and the reset state size A7 of each page structure 1342A corresponding to the first and second free half-pages. On the basis of the acquired management information, the page allocation unit 132 determines whether or not the zeroing state of the first free half-page corresponds to the zeroing state of the second half-page. free (step S4004). In particular, the page allocation unit 132 determines whether the reset state bit A1 of the first free half-page corresponds to the reset state bit A1 of the second free half-page, the page size of the first free half-page corresponds to the reset state size A7 of the first free half-page, and the page size of the second free half-page corresponds to the state size zero setting A7 of the second free half-page. When it is determined that the reset state of the first free half-page corresponds to the reset state of the second free half-page ("YES" in step S4004), the unit page allocator 132 collectively describes the management information on the first and second free half-pages as management information on the combined page (step S4005). In particular, the page allocation unit 132 holds the reset state bit A1 of the page structure 1342A corresponding to the first free half page as information indicating whether the combined page has been set. to zero or not. In addition, the page allocation unit 132 writes a total value of the reset state size A7 of the first and second free half-pages in the reset state size A7 of the structure of page 1342A corresponding to the first free half-page.
[0020] When it is determined that the state of zeroing of the first free half-page does not correspond to the zeroing state of the second free half-page ("NO" in step S4004), the The page allocation unit 132 maintains the management information on the first and second free half-pages as management information on the combined page (step S4006). In particular, the page allocation unit 132 holds the reset bit A1 of each of page structures 1342A corresponding to the first and second free half-pages as information indicating whether the combined page has been zeroed or not. In addition, the page allocation unit 132 maintains the reset state size A7 of each of the page structures 1342A corresponding to the first and second free half-pages as information on the region size set. to zero of the combined page. When the process in step S4005 or the process in step S4006 is executed, the page allocation unit 132 completes the update process series on the management information (step S4007). When the combined page and companion of the combined page are then combined, the page allocation unit 132 performs the update process series again on the management information. For the sake of understanding the process in step S4005 and the process in step S4006, the process of updating the management information associated with the combining process is described below with reference to FIGS. 11 to 13. The FIG. 11 is a first explanatory view of a process for updating the management information associated with a combination process. Figure 11 exemplifies the case in which two normal pages of 8 Kbytes G and H are combined in a large page I whose page size is 16 Kbytes.
[0021] In an example illustrated in FIG. 11, the memory region corresponding to the normal pages G and H in the memory is completely set to zero, and "reset state = zeroed for 8 Kbytes" is recorded in each region of the memory. In particular, in each region of management information of the normal pages G and H, the information "state of zeroing = zeroed" is recorded in the bit of reset state A1 of each of the page structures 1342A corresponding to the normal pages G and H. In addition, the information "reset state = 8 Kbytes" is stored in the reset state size A7 each of the page structures 1342A corresponding to the normal pages G and H.
[0022] In the normal pages G and H illustrated in FIG. 11, the reset state bit Al of the normal page G corresponds to the reset state bit A1 of the normal page H. In addition, the size of page of normal page G corresponds to the size of reset state A7 of normal page G. The page size of normal page H corresponds to the size of reset state A7 of the normal page H. Then, in the case where the normal pages G and H are combined in a large page I, the information on the zeroed state recorded in the management information region of the normal page G in the process in the step S4005 in Fig. 10 are maintained in the management information region of the large page L In addition, the total value of the region size set to zero of the normal pages G and H is maintained in the management information region of the main page L In particular, the information "reset status = set to zero "of the big page I is stored in the reset bit A1 of the page structure 1342A corresponding to a first normal half-page of the large page L In addition, the information" state of Zero = 16 Kbytes "of the big page I is stored in the A7 reset size of the page structure 1342A corresponding to a first normal half page of the large page I. Therefore, the Management information on the big page may not be saved in all page structures for each normal page on the big page. In addition, the management information on the big page can be acquired without reference to all the page structures of each normal page on the large page. Therefore, in the process of updating the management information associated with said one page according to the embodiment, the processes for searching and updating the management information on a page can be simplified and performed at a high speed. . Fig. 12 is a second explanatory view of a process of updating the management information associated with a combination process. Figure 12 exemplifies the case where two normal pages of 8 Kbytes J and K are combined in the large page L whose page size is 16 Kbytes. In the example illustrated in FIG. 12, the memory region corresponding to the normal page J in the memory has been set to zero, and the memory region corresponding to the normal page K in the memory has not been set. to zero. Then, in the management information region of the normal page J, "reset state = zero for 8 Kbytes" is recorded, and in the management information region of the normal page K, "state Zero = Not Set to Zero for 8 Kbytes "is recorded. In particular, the "reset state = zero for 8K bytes" information of the normal page J is recorded in the reset state bit A1 and the reset state size A7 of page structure 1342A corresponding to normal page J. The information "Zero state = not set to zero for 8 Kbytes" 3 0 1 7 2 2 2 32 of the normal page K is recorded in the bit d the reset state A1 and the reset state size A7 of the page structure 1342A corresponding to the normal page K. In the two normal pages 3 and K illustrated in FIG. reset state A1 of the normal page J does not correspond to the reset state bit Al of the normal page K. In addition, the page size of the normal page K does not correspond to the size of the normal page. reset state A7 of the normal page K. Then, in the process in step S4006 in FIG. 10, the information "reset state = reset to zero" r 8 Kbytes "of the normal page J is continuously maintained in the management information region of the combined large page L. In addition, the information" zeroing status = not set to zero for 8 Kbytes "of the normal page K is held continuously in the management information region of the combined page-wide L. In particular, the information "zero state = zeroed for 8 Kbytes" of the normal page J is continuously maintained by the reset state bit A1 and the reset state size A7 of the page structure 1342A corresponding to a first normal half page of the large page L. In addition, the The zero-state = not reset to 8 kbytes "information of the normal page K is continuously maintained by the reset state bit A1 and the reset state size A7 of the page structure 1342A corresponding to a second normal half-page of the large page L. Figure 13 is a third explanatory view a process for updating the management information associated with a combination process. Fig. 13 exemplifies a large page M obtained by combining the large page L illustrated in Fig. 12 with the large page I illustrated in Fig. 11. As illustrated in Fig. 12, in the management information region of FIG. large page L, "reset state = zero for 8 Kbytes" is saved as management information on a first normal half page. In addition, in the management area of the main page L, "reset state = set to zero for 8 Kbytes" is recorded as management information on a second normal half page. As illustrated in Fig. 11, in the management information region of the big page I, "zero state = zero for 16 Kbytes" is recorded. Therefore, the reset state of the large page L does not correspond to the reset state of the large page L That is, the reset state bit Al of the large page L does not correspond to the reset bit bit Al of the large page L Moreover, the page size of the large page L does not correspond to the reset state size A7 of the large page L. Then, as shown in FIG. 13, the management information region of the large page M continuously maintains the information on the reset state of the large pages L and I.
[0023] Therefore, in the case where large pages are combined, the management information on the combined large pages may not be recorded in all the page structures for each normal page in the combined large page. In addition, the management information on the combined page can be acquired without reference to all the page structures for each normal page in the combined page. Therefore, according to the process of updating the management information on a page according to the embodiment, the process of searching and updating management information on a page can be simplified and performed at a high speed. In addition, the process of combining pages together with the updating of management information can be done without dependence on the page size. As it appears from reading the explanation above, the information processing apparatus according to the embodiment in which the application execution computer 11 is used as an example manages the state. initializing the memory region corresponding to each page in the memory using the management information on each page having different page sizes. Then, the information processing apparatus according to the embodiment executes the initialization process on an uninitialized region indicated by the management information in the memory region corresponding to the free page. Therefore, with respect to the case in which all the memory regions corresponding to the page to be allocated are constantly initialized, the region size required to perform the initialization process in the allocation of the memory region can be reduced from in order to shorten the processing time of the entire allocation process accompanied by the initialization process. That is, the process of allocating an initialized memory region according to the size specified by a memory requester can be performed at a high speed. In addition, the information processing apparatus according to the embodiment can perform the initialization process on the memory region corresponding to a free page in the memory separately from the process of allocating the memory region in the memory . Therefore, since the desired region size for the initialization process in the allocation of a memory region can be reduced, the processing time of the entire allocation process accompanied by the initialization process can be reduced. That is, the process of allocating the initialized memory region according to the size specified by a memory acquisition requester can be performed at a higher rate. The different types of processes performed by the information processing apparatus according to the above-mentioned embodiment including the memory allocation process and the memory initialization process are illustrative only, and can be modified appropriate. For example, in the above description, the page combining process is an example performed in the memory release process, and can be modified so that the page combining process is performed during the allocation process. of memory. As described above, in the information processing apparatus according to the embodiment, the execution of the memory allocation process takes precedence over the execution of the memory initialization process which is performed in a manner asynchronous with the memory allocation process to remove the delay of a task for which a memory allocation is requested. In addition, in the information processing apparatus according to the embodiment, the asynchronous reset process can be controlled to suppress the influence on the execution of a task. The timer with which the process planner processing unit 131 allows the reset unit 133 to perform the zeroing process in cooperation with the task planner processing unit 12A and the unit task management 110 may be the two following timers, i.e., there is a first timeout at which all application program tasks specified via a task scheduling system such as the job scheduler. Task scheduler processing 12A and task management unit 110 are completed in the application execution computer 11. In addition, there is a second timer at which the initialization process is performed simultaneously with the task. of the specified application program via the scheduling system in the application execution computer 11. using an example of the application execution computer 31 shown in FIG. Figure 4, a method of controlling the zeroing process with the first and second timers is described below.
[0024] The first delay is described first. Fig. 14 is an explanatory view of a zeroing process with the first timer. For clarity of explanation, some of the components of the application execution computer 31 shown in Fig. 4 are omitted. With the first timer at which all the application program tasks specified via the task scheduling system are completed, no task has priority over the zeroing process in the application execution computer 31. Therefore, with the first timer, the CPU resources in the application execution computer 31 are used to perform the zeroing process so that the zeroing process on the main memory 340 can be completed. in a short time. For example, as shown in Fig. 14, the reset process on the main memory 340 is completed in a short time by allowing two CPU cores 310 among the four CPU cores 310 to perform the update process. zero. With the first timer, the CPU core 310 that performs the zeroing process can exclusively use the level 2 cache 330 and a memory bus on the bus 380. The second timer is described below. Fig. 15 is an explanatory view of a zeroing process with the second timer. FIG. 15 illustrates an example in which a CPU core 310 to which no task is allocated can perform the zeroing process when a task is allocated to three CPU cores 310 in the four CPU cores 310 included in the Application execution computer 31. For the sake of clarity, a portion of the components of the application execution computer 31 shown in FIG. 4 are omitted. With the second timer at which the zeroing process is performed simultaneously with execution of the specified application program task, the level 2 cache 330 and the memory bus in the bus 380 are shared by the heart of CPU 310 that performs the task and the CPU core 310 that executes the zeroing process. Because the level 2 cache band 330 and the memory bus are limited, the memory access performance of a task is degraded if the level 2 cache band 330 and the memory bus are allocated to the execution of the zeroing process, and a delay in the execution of the task may occur. Therefore, with the second timer, a check is made so that the zeroing process is performed using at least one of the two methods described below.
[0025] First, in the first control method, with the storage instruction in the zeroing process, the CPU core 310 that executes the zeroing process uses an instruction to suppress the use of a cache. In particular, the CPU core 310 that executes the zeroing process accesses the main memory 340 using the CPU instruction that is able to directly access the memory bus bypassing the level 2 cache 330. the first control method, since the level 2 cache 330 is not shared between the CPU core 310 which performs a task and the CPU core 310 which executes the zeroing process, the influence on the execution of a task can be reduced.
[0026] In the second control method, the interconnection 370 is implemented with the Remote Direct Memory Access (RDMA) function. In addition, a zeroed memory region is set in advance in main memory 340 of any compute node 31 in a plurality of compute nodes (application execution computers) 31 included in the system. 3. Then, the compute node 31 which executes the zeroing process transfers the memory region set to zero in a compute node 31 to the main memory 340 in the compute node 31 through the RDMA via RDMA. interconnection 370, so as to execute the process of resetting a specified region in the main memory 340. When the interconnection 370 is connected to the memory bus as illustrated in FIG. 15, the interconnection 370 can directly access to the main memory 340 without the level 2 cache 330. Therefore, in the second control method, since the zeroing process can be performed without any contention for the cache of level 2330 between the CPU core 310 which performs a task and the CPU core 310 which executes the zeroing process, the influence on the execution of the task can be reduced.
[0027] As described above, the components for performing the various processes mentioned above according to the embodiment comprising the page allocation unit 132 and the zeroing unit 133 may be realized by hardware components comprising the CPU core 310, the level 1 cache 320, and the level 2 cache 330. In addition, the components for performing the various processes mentioned above according to the embodiment can also be performed by a computer that executes a control program that regulates the various process procedures mentioned above including the memory allocation process and the memory initialization process according to the embodiment. For example, the control program that regulates the various process procedures mentioned above is stored in a recording medium such as a magnetic disk, an optical disk, a magneto-optical disk, and so on. The control program stored in the recording medium is stored in the storage 350 via the storage medium reader 360. Next, the processor comprising the CPU core 310, the level 1 cache 320, and the level cache 2330 reads the control program stored in the storage 350 in the main memory 340, and executes the control program.

权利要求:
Claims (27)
[0001]
REVENDICATIONS1. An information processing apparatus comprising: a free page storage unit (134) that divides a memory region (1341) into a page memory of a plurality of different page sizes and manages the divided pages, and stores management information (A1, A7) on an initialization state corresponding to a region of unused memory in the memory; and a page allocation unit (132) which selects a free page of a page size according to a requested region size or a requested page size from the free page storage unit when an allocation of the unused memory region is requested, and performs an initialization process on a memory region on which the initialization process has not been performed in a memory region corresponding to the free page using information management on the selected free page.
[0002]
An information processing apparatus according to claim 1, wherein: the free page storage unit (134) comprises a page structure (1342A) defined in normal page units having the smallest page size in the plurality of different page sizes; when first and second normal pages are free pages on which the initialization process has been performed, the page allocation unit (132) stores management information on a large page obtained by combining the first and second pages normal in the page structure (1342A) corresponding to the first normal page; and when any one of the first and second normal pages is a free page on which the initialization process has not been performed, the page allocation unit (132) stores the management information on the large page in each of the page structures (1342A) corresponding to the first and second normal pages.
[0003]
An information processing apparatus according to claim 2, wherein: when a page size of a large page corresponds to an initialized region size indicated by the management information on the large page, the unit of page allocation (132) records a size obtained by dividing by two the region size initialized in the page structures (1342A) corresponding to each of the third and fourth normal pages obtained by dividing the page; and when the page size of the large page does not match the initialized region size, the page allocation unit (132) stores information about the page structure corresponding to a first half page on the large page as information on the page structure corresponding to the third normal page, and stores information on the page structure corresponding to a second half-page on the main page as information on the page structure corresponding to the fourth normal page.
[0004]
An information processing apparatus according to any one of claims 1 to 3, further comprising a reset unit (133) which performs an asynchronous initialization process on a memory region corresponding to the stored free page. in the free page storage unit (134) using the management information on the free page with a time delay different from a memory region allocation process timer, the allocation process including the initialization process performed by the page allocation unit (132).
[0005]
An information processing apparatus according to claim 4, wherein the reset unit (133) determines whether or not the free page selected from the free page storage unit (134) is a page to be allocated by the page allocation unit (132), and suspends the asynchronous initialization process on the free page when the selected free page is a page to be allocated by the page allocation unit.
[0006]
An information processing apparatus according to claim 4 or claim 5, wherein the management information on the free page comprises a control flag (A3) for controlling the execution of the asynchronous initialization process performed by the zeroing unit on the free page, and when it is determined that the free page is a page to be processed in the allocation process, the page allocation unit (132) sets a suspension flag to suspend the asynchronous initialization process performed by the reset unit on the control flag (A3).
[0007]
An information processing apparatus according to claim 6, wherein the reset unit (133) confirms whether or not the suspension flag has been set on the control flag (A3) after the process of Initialization on a normal page in the free page has been done.
[0008]
An information processing apparatus according to any one of claims 4 to 7, further comprising a process planner processing unit (131) which controls a time delay at which the zeroing unit (133) executes the asynchronous initialization process; wherein the process planner processing unit (131) allows the reset unit (133) to perform the asynchronous initialization process with a first timeout with which a task performed using an allocated initialized memory region by the page allocation unit (132) has been performed.
[0009]
An information processing apparatus according to claim 8, whereinwith a second timer during a task performed using a memory region allocated by the page allocation unit (132), the scheduler processing unit process (131) allows the resetting unit (133) to perform the asynchronous initialization process without using a shared cache with a process thread that executes the task or a memory bus between the process unit reset (133) and memory (1341).
[0010]
10. A control method executed by an information processing apparatus, the control method comprising: storing in a free page storage unit (134) which divides a memory region in a memory (1341) into pages of a plurality of different page sizes and manages the divided pages of management information (A1, A7) on an initialization state corresponding to an unused memory region in the memory; selecting a free page of a page size according to a requested region size or a requested page size from the free page storage unit (134) when an allocation of the unused memory region is requested; and performing an initialization process on a memory region on which the initialization process has not been performed in a memory region corresponding to the free page using management information on the free page selected. 25
[0011]
The control method of claim 10, wherein the free page storage unit (134) comprises a page structure (1342A) defined in normal page units having the smallest page size among the plurality of sizes. of different pages, and the control method further comprising: recording management information on a large page obtained by combining first and second normal pages in the page structure (1342A) corresponding to the first normal page when the first and second normal pages are free pages on which the initialization process was performed; and recording the management information on the large page in each of the page structures (1342A) corresponding to the first and second normal pages when any of the first and second normal pages is a free page on which the process is performed. initialization was not performed. 10
[0012]
The control method of claim 11 further comprising: recording a size obtained by dividing by two an initialized region size in each of the page structures (1342A) corresponding to third and fourth normal pages obtained by division a large page when a page size of the large page corresponds to the initialized region size indicated by the management information on the large page; and storing page structure information corresponding to a first half page on the main page as information on the page structure corresponding to the third normal page when the page size of the large page does not match at the initialized region size, and the page structure information storage corresponding to a second half page in the large page as information on the page structure corresponding to the fourth normal page.
[0013]
The control method of any one of claims 10 to 12, further comprising executing an asynchronous initialization process on a memory region corresponding to the free page stored in the free page storage unit. (134) using the management information on the free page with a different timing of an allocation process process of a memory region, the allocation process including the initialization process.
[0014]
The control method of claim 13 further comprising: determining whether the free page selected from the free page storage unit (134) is a page to be processed in the allocation process; and suspending the asynchronous initialization process on the free page when the free page is a page to allocate in the page allocation process.
[0015]
A control method according to claim 13 or claim 14, wherein the management information on the free page comprises a control flag (A3) for controlling the execution of the asynchronous initialization process on the free page, and the control method further comprising defining a suspend flag to suspend the asynchronous initialization process on the control flag (A3) when it is determined that the free page is a page to be processed in the process of 'allocation.
[0016]
The control method of claim 15 further comprising confirming whether or not the suspend flag has been set on the control flag (A3) after the asynchronous initialization process on a normal page in the free page has been completed. been done.
[0017]
17. The control method of any one of claims 13 to 16 further comprising: controlling a timer at which the asynchronous initialization process is performed; and executing the asynchronous initialization process with a first timer with which a task performed using an initialized memory region allocated by the allocation process has been executed. 30
[0018]
The control method of claim 17 further comprising executing the asynchronous initialization process with a second timer during a task performed using a memory region allocated by the allocation process without using a shared cache with the execution. of the task and a memory bus to the memory (1341).
[0019]
19. A control program for causing a computer to execute a process comprising: storing in the free page storage unit (134) that divides a memory region in a memory (1341) into pages of a plurality of sizes of different pages and manages the divided pages of management information (A1, A7) on an initialization state corresponding to a region of unused memory in the memory; selecting from the free page storage unit a free page of a page size according to a requested region size or a requested page size from the page storage unit free (134) when an allocation of the unused memory region is requested; and performing an initialization process on a memory region on which the initialization process has not been performed in a memory region corresponding to the free page using management information (A1, A7) on the 20 free page selected.
[0020]
The control program of claim 19, wherein the process further comprises the free page storage unit (134) comprises a page structure (1342A) defined in normal page units comprising the smallest size of the page. page among the plurality of different page sizes, and further comprising: recording management information on a large page obtained by combining first and second normal pages in the page structure (1342A) corresponding to the first normal page when the first and second normal pages are free pages on which the initialization process has been performed; and recording the management information on the large page in each of the page structures (1342A) corresponding to the first and second normal pages when any of the first and second normal pages is a free page on which the process of initialization was not performed.
[0021]
The control program of claim 20, wherein the process further comprises: recording a size obtained by dividing by two an initialized region size in each of the page structures (1342A) corresponding to third and fourth normal pages obtained by dividing a large page when a page size of the large page corresponds to the initialized region size indicated by the management information on the large page; and storing page structure information corresponding to a first half-page in the large page as information on the page structure corresponding to the third normal page when the page size of the large page does not match not at the initialized region size, and the page structure information storage corresponding to a second half page in the large page as information on the page structure corresponding to the fourth normal page.
[0022]
22. The control program of any one of claims 19 to 21, wherein the process further comprises executing an asynchronous initialization process on a memory region corresponding to the free page stored in the unit. free page storage (134) using the management information on the free page with a different timing of a memory region allocation process timeout, the allocation process including the initialization process. 30
[0023]
The control program of claim 22, wherein the process further comprises: determining whether the free page selected from the free page clearing unit (134) is a page to be processed in the process of allocation ; and suspending the asynchronous initialization process on the free page when the free page is a page to allocate in the page allocation process.
[0024]
The control program of claim 22 or 23, wherein the management information on the free page includes a control flag (A3) for controlling the execution of the asynchronous initialization process on the free page, and the a process further comprising defining a suspend flag to suspend the asynchronous initialization process on the command flag (A3) when it is determined that the free page is a page to be processed in the allocation process.
[0025]
The control program of claim 24, wherein the process further comprises confirming whether or not the suspend flag has been set on the control flag (A3) after the asynchronous initialization process on a normal page in the free page has been made.
[0026]
The control program of any one of claims 22 to 25, wherein the process further comprises: controlling a timer at which the asynchronous initialization process is performed; and performing the asynchronous initialization process with a first timer with which a task performed using an initialized memory region allocated by the allocation process has been performed. 30
[0027]
The control program of claim 26, wherein the process further includescontrolling the asynchronous initialization process with a second timer during a task performed using a memory region allocated by the allocation process without using a shared cache. with the execution of the task and a memory bus at the memory (1341).

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同族专利:

---

公开号 | 公开日

---

US9489295B2|2016-11-08|

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引用文献:

---

公开号 | 申请日 | 公开日 | 申请人 | 专利标题

---

---

JP3061001B2|1997-06-12|2000-07-10|日本電気株式会社|Memory allocation method in computer system|

---

US6182089B1|1997-09-23|2001-01-30|Silicon Graphics, Inc.|Method, system and computer program product for dynamically allocating large memory pages of different sizes|

---

US6658437B1|2000-06-05|2003-12-02|International Business Machines Corporation|System and method for data space allocation using optimized bit representation|

---

JP2006048437A|2004-08-05|2006-02-16|Matsushita Electric Ind Co Ltd|Memory allocation method|

---

JP2006048436A|2004-08-05|2006-02-16|Matsushita Electric Ind Co Ltd|Memory allocation method|

---

JP2006215991A|2005-02-07|2006-08-17|Fujitsu Ltd|Dma controller|

---

US7716448B2|2007-02-28|2010-05-11|Red Hat, Inc.|Page oriented memory management|

---

WO2012107988A1|2011-02-07|2012-08-16|富士通株式会社|Memory management program, memory management method and information processing device|

---

US9286201B2|2013-09-25|2016-03-15|Globalfoundries Inc.|Method and system for automatic space organization in tier2 solid state drive cache in databases for multi page support|JP2016048502A|2014-08-28|2016-04-07|富士通株式会社|Information processor and memory access processing method|

---

KR20160143453A|2015-06-05|2016-12-14|삼성전자주식회사|Electronic Device AND Memory Management Method Thereof|

---

US9904337B2|2015-06-25|2018-02-27|International Business Machines Corporation|Affinity-aware parallel zeroing of pages in non-uniform memory accessservers|

---

CN107220093B|2017-06-20|2021-01-01|北京金山安全软件有限公司|Process processing method and device|

---

US10996977B2|2017-08-24|2021-05-04|Fujitsu Limited|Information processing apparatus and process management method that control a number of processes executed in parallel|

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优先权:

---

申请号 | 申请日 | 专利标题

---

JP2014017240A|JP6244949B2|2014-01-31|2014-01-31|Information processing apparatus, control method, and control program|

---