• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
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  • 优先权
    • 专利摘要:
    method and apparatus for configuring thermal energy design on a microprocessor. a technique for changing a thermal energy project (tdp). in one mode, one or more environmental or user-driven changes can cause the processor's tdp value to change. additionally, in some modes a change in tdp can change a target frequency of the turbo mode.
    公开号:BR112013015447B1
    申请号:R112013015447-0
    申请日:2011-12-08
    公开日:2021-03-23
    发明作者:Eric Distefano；Guy M. Therien；Vasudevan Srinivasan；Venkatesh Ramani；Ryan D. Wells；Steven H. Gunther；Jeremy Shrall；James Hermerding II；Tawfik Rahal-Arabi
    申请人:Intel Corporation；
    IPC主号:
    专利说明:

    [0001] [001] This is a part-continuation of the 12 / 974,100 series order filed on December 21 currently pending. FIELD OF THE INVENTION
    [0002] [002] Modalities of the invention generally refer to the field of information processing and more specifically, the field of energy management in computer systems and microprocessors. BACKGROUND
    [0003] [003] The importance of controlling energy consumption in microprocessors is increasing. To control the power consumption of the processor, some prior art techniques have not adequately allowed a flexible configuration of the design thermal power specification (TDP) for the processor. BRIEF DESCRIPTION OF THE DRAWINGS
    [0004] [004] The modalities of the invention are illustrated by way of example, and not by way of limitation, in the figures in the accompanying drawings and where similar reference numbers refer to similar elements and in which:
    [0005] [005] Figure 1 illustrates a technique for configuring the project thermal power (TDP) according to a modality.
    [0006] [006] Figure 2 illustrates aspects of at least one technique for configuring TDP according to a modality.
    [0007] [007] Figure 3 illustrates aspects of an initialization technique corresponding to a TDP configurable according to a modality.
    [0008] [008] Figure 4 illustrates aspects of at least one technique for configuring TDP according to a modality.
    [0009] [009] Figure 5 illustrates aspects of at least one technique for configuring TDP according to a modality.
    [0010] [0010] Figure 6 illustrates aspects of at least one technique for configuring TDP according to a modality.
    [0011] [0011] Figure 7 illustrates a block diagram of a microprocessor, in which at least one embodiment of the invention can be used.
    [0012] [0012] Figure 8 illustrates a block diagram of a shared bus computer system, in which at least one embodiment of the invention can be used;
    [0013] [0013] Figure 9 illustrates a block diagram of a point-to-point interconnected computer system, in which at least one embodiment of the invention can be used. DETAILED DESCRIPTION
    [0014] [0014] The modalities of the invention pertain to the consumption of the design thermal power (TDP) configurable for a processor. Although there are multiple modalities of multiple aspects of the invention, at least one or more aspects are illustrated here by way of example in order to show modalities of the invention and should not be constructed to be a set of exhaustive or exclusive modalities.
    [0015] [0015] Processors can be classified or specified to include both performance and energy related characteristics. Individual products or product families may have an associated specification including specific base frequency and turbo capabilities as well as other performance-related characteristics. A range of power consumption on a processor can be specified for a product family. For example, standard voltage mobile (SV) processors should have a design thermal power rating (TDP) of 35 Watts. This rating may be an indication for original equipment manufacturers (OEMs) who purchased processors from an OEM that will dissipate power that is less than or equal to the TDP value specified for the product when operating a specified TDP workload that may represent a worse situation. of real workload cases when operating in a worse temperature case. Although the performance characteristics specified may change across a product family. TDP can be specified with the same value across numerous product families. This allows an OEM to design a single platform that is capable of dissipating the specified TDP while offering a range of performance at different price points. Turbo capability, on the other hand, is a potential performance at the top where TDP's workload can cause TDP's energy to be dissipated at the base frequency.
    [0016] [0016] In some modalities, there are several types of turbo mode. Above is a turbo mode version for sharing workload or bundle energy, in which case workloads that are otherwise less than natural energy less than TDP applications without turbo can benefit on the same frequency. These workloads can benefit by allowing the power to back up to the packet's TDP power giving you more than the base frequency. Another version of the turbo mode is the dynamic turbo mode, in which the energy is allowed to exceed the energy of the TDP for a limited duration, so that, on average, over time, the energy is still TDP energy, which allows for short excursions exceeding the TDP if preceded by lesser energy than the TDP, if, for example, it is an idle workload or exactly a workload that does not pull an energy equal to the limit energy of TDP. TDP energy also impacts design requirements for power distribution.
    [0017] [0017] The thermal capacity of the platform is a design choice for OEMs such as impacts, size, weight, audible noise and material cost ratio (BOM). The TDP specified for the processor, therefore, has a significant impact on the design of the thermal platform. Some processors are sold with only a few TDPs. For example, SV for mobile processors at 35W, SV for low voltage processors at 25W, and SV for ultra low voltage processors at 18W.
    [0018] [0018] On mobile platforms, it is possible that the cooling capacity and the tolerance of audible noise may vary depending on the environment of use. For example, when powered and operating on alternating current (AC) power, a platform may have more cooling capacity when operating not powered on battery power.
    [0019] [0019] Operating a larger power processor in an environment with lower cooling capacity than the one that can cool the specified TDP can cause thermal control to reduce performance to which it is really an unknown capacity level that varies across products. Additionally, the capacity of the turbo can be disabled as part of thermal control.
    [0020] [0020] A configurable TDP, according to the modality, can allow the OEM to configure the processor's TDP to one of several values. This configuration can be done either statically at startup or dynamically, "outbound". This is effectively accomplished by changing the base frequency of the processor to one of the various base frequencies supported. The implication of this change may be that certain performance is guaranteed by the base frequency and the TDP is specified for each of the supported base frequencies. Additionally, when the base / TDP frequency is changed, the point where the turbo engages can consequently also change. This provides the OEM with the ability to ensure that maximum energy dissipation is known while still delivering turbo boost performance when the presented workload allows.
    [0021] [0021] Figure 1 illustrates a technique for providing a configurable TDP in a processor, according to one modality, providing three levels of TDP, such as "Ascending TDP" 105, "Nominal TDP" 110 and "Descending TDP" 115, which can correspond to energy states, such as P P0 130, P5 125, and P9 120 states, respectively. Since the value of TDP changes dynamically, in one modality, the amount of turbo capacity also changes allowing more at the top for turbo boost technology while still providing specific performance to the end user.
    [0022] [0022] In one embodiment, a configurable TDP technique includes validated and configured frequency settings and TDP values provided for a processor. In one embodiment, the validity values can be merged, programmed or otherwise configured on the hardware allowing the firmware or platform software to detect and use the capacity.
    [0023] [0023] In one embodiment, the configurable TDP provides a mechanism for project processors for new platform segments. For example, processors that support configurable TDP can command a premium over other non-configurable TDP processors. OEMs can then choose to purchase a processor and configure it for their needs or provide it on a platform that supports reconfiguration of performance and power output. One such example is a non-powered, battery powered "extreme mobile edition" platform. Configurable TDP has the potential to reduce the number of product families offered, too.
    [0024] [0024] In one embodiment, the configurable TDP architecture does not make assumptions about standards or interdependence with other technologies, etc. Table 1 describes various aspects and portions of a platform that can be affected by a configurable TDP, according to a modality. Table 1
    [0025] [0025] In one mode, changes can be made to the model-specific records (MSRs) of a processor and new MSRs can be used to support the configurable TDP for the processor. These records can provide the ability to change the point where the turbo engages, for example, and to adjust the energy limit of the average runtime (RAPL) energy limit value to the new base frequency. In one embodiment, a list of records that can be accessed, changed or added using a configurable TDP, includes:
    [0026] [0026] PLATFORM_INFO: This register can be used to detect the configurable TDP's capacity,
    [0027] [0027] CONFIG_TDP_LIMIT_1; CONFIG_TDP_LIMIT_2: This register can be used to detect the configurable TDP ratios and corresponding TDP energy and energy range,
    [0028] [0028] CONFIG_TDP_CONTROL: This register can be used to allow the software to select different TDP points and read the current selection,
    [0029] [0029] PSTATE_NOTIFY Hook: This register can be used to allow the software to enable the turbo from a new P1 ratio point. Having this separate CONFIG_TDP_CONTROL record can enable the use of models where the OS must select a specific ceiling for the range of capable turbo.
    [0030] [0030] In other modalities, other records or storage (for example, memory, cache, etc.) can be used enabling a configurable TDP. In addition, in some modalities the functions provided in the records above can be incorporated into a smaller number of records or storage.
    [0031] [0031] In some modalities, there may be no physical requirements for a single platform for configurable TDP. However, in some modalities, specifications for and cooling can be developed to address requirements for each of the TDP points. The specifications may reflect the ability to select levels of TDP to design and accommodate or not accommodate other points, in some modalities.
    [0032] [0032] In some modalities, new interfaces or technologies may not be specifically required to support a configurable TDP. However, in some modalities, affected design characteristics that can be addressed in specifications and training include thermal current design (ITDC) and the maximum possible current that can be supported (for example, "Iccmax"). In some modalities, parameters can be defined for each TDP point.
    [0033] [0033] TDP may imply that an indefinitely sustained cooling level is present to support the corresponding TDP's energy level. However, in one modality, no specific technique is required to represent changes in cooling capacities, whether the design is exotic, cooling on, changes in fan speed, changes in the environment, etc. However, cooling design requirements can be established for each level of TDP in training documentation.
    [0034] (1) Via uma interrupção ao acionador do dispositivo de gráficos do processador quando o nível de TDP e a frequência de RP1 correspondente muda. Isso pode exigir registros de configuração de interrupção e de status além dos registros já necessários para suportar a TDP configurável, em uma modalidade. (2) Via a pilha de software notificando o acionador de gráficos quando o nível de TDP e a frequência de RP1 correspondente muda. Isso pode exigir atualizações à interface de comunicação do acionador de software para gráficos já no lugar como parte de pilha de software. [0034] In one mode, TDP configurable for another logic, such as graphics, memory control, or peripheral control can be used. For example, if configurable TDP is used for graphics, a graphics trigger may need to be notified of the new TDP level and corresponding RP1 frequency. This can be done in at least two ways, in one modality: (1) Via an interruption to the trigger of the processor's graphics device when the TDP level and the corresponding RP1 frequency changes. This may require interrupt and status configuration records in addition to the records already needed to support configurable TDP, in one mode. (2) Via the software stack notifying the graphics driver when the TDP level and the corresponding RP1 frequency changes. This may require updates to the software driver's communication interface for graphics already in place as part of the software stack.
    [0035] [0035] In one embodiment, the TDP configuration may require the platform to restrict the OS from using certain P states (for example, ACPI Notification), exposing all possible P states to the initializing OS and enabling the turbo capability in several points of operation. The P ACPI status table (PSS) can be appropriately populated, in some modalities. In one embodiment, there can be no ecosystem requirements to support configurable TDP.
    [0036] [0036] In one embodiment, the configurable TDP is each statically configured to a different value than the standards merged by the BIOS during startup, for example, or both by the BIOS and by a software driver dynamically during run time. In one embodiment, a TDP setting is achieved by writing a new turbo ratio limit for an MSR to adjust the point where the turbo engages and writing a corresponding energy limit for the RAPL MSR energy limit according to the value specified for the part / base frequency. Additionally, in some modalities, the operating system can be notified to limit its use of P states according to the new base frequency. This can be achieved, in a modality, making OS evaluate the object of ACPI_PPC (Current Performance Capabilities) through each logical processor.
    [0037] [0037] Figure 2 illustrates logic for configuring TDP, according to a modality. The logic illustrated in Figure 2 can be included in processor hardware or some other hardware. Alternatively, the logic in Figure 2 can be incorporated into a tangible, machine-readable medium with instructions stored there, which, if operated, cause the logic function illustrated in Figure 2 to be operated. In Figure 2, the OSPM power configuration applet 215 can be optional and its use of DPPE serves as a trigger 245 to invoke a TDP configuration change. By means of a trigger 245, for example, a power source or change of power plan, the applet communicates the change to the DPTF 220 trigger.
    [0038] [0038] The DPTF 220 trigger receives the TDP configuration change from the OSPM power configuration applet and performs two functions as a result. The first is to evaluate an ACPI object within its scope of the device that causes an ACPI notification to be issued by BIOS 210 on a logical processor 225 for the OS to inform it to reevaluate the PPC object through each logical processor. The return value of the object is derived from a value passed by the DPTF 220 actuator and limits the use of the operating systems of certain states P for the new base frequency and below. After this is achieved, the DPTF trigger 220 writes the new TDP setting 270 to logic processor 225 (MSR writes) to adjust the new turbo ratio (point where the turbo is invoked) for the processor and the Power Limit value RAPL for the new base frequency.
    [0039] [0039] In one embodiment, the processor contains the MSRs described above. Writing MSR can carry information to the energy control unit (PCU) in state P where the turbo is invoked (turbo ratio) as well as the RAPL energy limit value.
    [0040] [0040] In one mode, BIOS 210 contains ACPI firmware and natively operable code. BIOS 210 may be responsible for detecting availability of the Configurable TDP 255 feature, in one mode, and installing ACPI firmware structures appropriately (_PSS). BIOS 210 can statically configure a TDP that is less than the maximum for a product or product family during boot. Alternatively, BIOS 210 alone can dynamically adjust the TDP configuration through a combination of running SMM and ACPI notifications, in one mode. DPTF can also be used to adjust the TDP configuration dynamically, but in any case, BIOS 210 may contain ACPI firmware that is evaluated to signal the OS to reevaluate the _PPC object using any logical processor. In one embodiment, the evaluation of the _PPC object determines that the P states are currently available for use by the OS - corresponding to the TDP configuration (including the P state where the turbo is invoked).
    [0041] [0041] In one mode, the OS receives 230 notification from ACPI that causes it to reevaluate the _PPC object through each logical processor. The value returned from the _PPC object evaluation limits the operating systems of the P state control software 205 to use certain P states according to the TDP configuration. When the TDP configuration changes, the highest performing P state allowed by the _PPC object is set to become a P state that invokes the turbo operation.
    [0042] [0042] To initialize the configurable TDP 255, the Platform BIOS 210 can first detect the characteristic availability, according to a modality. Then it can structure the OSPM _PSS table using the configurable TDP 225 information it collects from the processor. Figure 3 illustrates an initialization technique, according to a modality. For example, BIOS 310 can first detect the characteristic availability in process 330. Then BIOS 310 can structure the OSPM _PSS table in process 325 using configurable TDP information, such as TDP levels and the reasons it collects from the processor / PCU 315 in case 335.
    [0043] [0043] BIOS 310 can program a maximum TDP ratio or a desired TDP ratio as the current TDP ratio in the processor / PCU 315 as illustrated in process 340. BIOS 310 can also set _PPC to zero "0" or the state P corresponding to a desired TDP ratio to indicate the states P allowed in process 345, and report the _PSS table to OSPM 320. OSPM 320 can change state P for processor / PCU 315 to a new state P maximum (depending on workload) in process 355. If the target rate is greater than the current P1 ratio, then the processor / PCU 315 can enable the turbo in process 350. The boot technique in Figure 3 and other processes or mechanisms described herein are operated by logical processing which may comprise hardware or software operating codes or dedicated firmware operable by general-purpose machines or by special-purpose machines or a combination of both.
    [0044] [0044] In one modality, there are three possible mechanisms with which the TDP can be changed during the execution time. In other modalities, other techniques or mechanisms can be used to change the TDP during runtime. In one embodiment, the platform can provide an option for the end user 405 to select modes specific to the system and could be provided as a shortcut key entry 425. In this example, the action of the shortcut key by the user triggers the change of the TDP value during running time. Figure 4 illustrates the flow of a TDP change initiated by the user, according to one modality. The next selection of a new TDP mode of operation for the system as a hotkey entry in process 42, BIOS 410 can program a new P1 ratio and program the RAPL power limit for the new TDP point in process. cessador / PCU 415 as illustrated in process 430. BIOS 410 can also adjust _PPC to a new maximum available P state (new turbo P state in _PSS) in process 440, and report the _PSS table to OSPM 420. OSPM 420 can then change the status P for the processor / PCU 415 to the new maximum state P (depending on the workload) in process 445. If the target rate is greater than the current P1 ratio, then the processor / PCU 415 can enable the turbo in the 435 process.
    [0045] [0045] An employment model, according to one modality, uses the platform software to intercept user input and convert this into BIOS 510 calls to invoke the TDP change. Figure 5 illustrates this employment model, according to one modality. In process 530, for example, event 505 may comprise a user selection of a new TDP mode via a power-pan setting or a GUI software or a link, etc., and a change triggered by event 505 is communicated to the DPTF 520 trigger. The DPTF 520 trigger invokes an ACPI method with a new P1 selection that causes an ACPI notification to be issued by BIOS 510 in process 540 to OSPM 515 to inform it to adjust the _PPC object to a new maximum available P status (new turbo P status in _PSS). OSPM 515 can then change state P for processor / PCU 515 to the new state maximum P (depending on workload) in process 555. The return value of the ACPI object is derived from a value passed by the DPTF 520 trigger .
    [0046] [0046] In one embodiment, the processor / PCU 525 contains MSRs as described above. Writing an MSR can carry information to the 525 processor / PCU in state P where the turbo is invoked (turbo ratio) as well as the RAPL energy limit value. Then in process 545, the DPTF trigger 520 programs the new ratio P1 in the processor / PCU 525 (via written MMIO / MSR) to adjust the new turbo ratio (point where the turbo is invoked) for the processor / PCU 525 , and program the RAPL Energy Limit value for the new TDP base frequency point. If the target rate is greater than / the current ratio P1, then the processor / PCU 525 can enable the turbo in process 550.
    [0047] [0047] In some modalities, the platform may choose not to provide a user control to modify the TDP, but, the basis of the decision on system events such as switching from AC to DC, or on vs. event. not connected, etc. This employment model is described in the sequence shown in Figure 6, according to one modality. In case 625, for example, the EC 605 platform notifies BIOS 610 of a new requirement from TDP according to a system event as described above. BIOS 610 can program a new P1 ratio and program the RAPL power limit for the new TDP point on the 615 processor / PCU as illustrated in process 630. BIOS 610 can also adjust _PPC to a new maximum available P state (new turbo P status in _PSS) in process 635, and reports the _PSS table to OSPM 620. The OSPM 620 can then change state P for processor / PCU 615 to the new maximum state P (depending on workload) in process 645. If the target rate is greater than the current P1 ratio, then the processor / PCU 615 can enable the turbo in process 640.
    [0048] [0048] In one mode, the TDP configuration can be changed dynamically as described above.
    [0049] [0049] In one embodiment, the configurable TDP can interoperate with the platform firmware and thermal control capability that manipulates ACPI objects to ensure that collisions do not occur. In one embodiment, the average running time energy limitation (RAPL) allows a platform to limit processor power consumption. Because the platform can use the details of TDP as a basis for RAPL limits, the fact that TDP dynamically changes should result in the RAPL limit becoming invalid. For example, consider a case where the current TDP is 15W and the RAPL limit has been adjusted to 14W by the platform. When the current TDP changes to 23W, the RAPL limit of 14W is very restrictive and the processor will not be able to maintain the RAPL limit. In order to resolve this issue, the RAPL limit can be updated as part of the configurable TDP change during the run time to match the new TDP level, according to one modality.
    [0050] [0050] In one modality, TDP maps configurable for two platform characteristics (grouping of interface specification)). These are the TDP (Configuration) and Trigger configurability interface.
    [0051] [0051] Feature name: Configuration TDP Platform Feature (PFAS) Configuration TDP Configuration TDP. Trigger Configuration TDP.Trigger.application Configuration TDP.Trigger.activator (DPTF) Configuration TDP.Gatilho.bios Configuration TDP. Configuration (Interface) Configuration TDP. Configuration.bios Configuration TDP. Driver.configuration (DPTF) Configuration TDP. Configuration.cpu Configuration TDP. Configuration.GFXD drive
    [0052] [0052] Some additional features, according to a modality, include new or new uses of the MSRs processor and changes to the driver graphics.
    [0053] [0053] Figure 7 illustrates a microprocessor in which at least one embodiment of the invention can be used. In particular, Figure 7 illustrates a microprocessor 700 having one or more processor cores 705 and 10, each having associated with it a local cache 707 and 713, respectively. Also illustrated in Figure 7 is a shared cache memory 715 that can store versions of at least some of the information stored in each of the local caches 707 and 713. In some embodiment, the microprocessor 700 can also include other logic not shown in Figure 7, such as an integrated memory controller, integrated graphics controller, as well as other logic to perform other functions within a computer system, such as I / O control. In one embodiment, each microprocessor in a multiprocessor system or each processor core in a multi-core processor can include or otherwise be associated with logic 719 to enable flexible configuration of TDP specification techniques, in accordance with with at least one modality. The logic can include circuits, software (embedded in a tangible medium) or both to enable more efficient resource allocation between a plurality of cores or processors than in some prior art implementations.
    [0054] [0054] Figure 8, for example, illustrates a frontal bus computer system (FSB) in which a modality of the invention can be used. Any processor 801, 805, 810 or 815 can access information from any cache memory of a local level (L1) 820, 825, 830, 835, 840, 845, 850, 855 within or otherwise associated with one of the cores of the processor 823, 827, 833, 837, 843, 847, 853, 857. Furthermore, any processor 801, 805, 810 or 815 can access information from any of the shared-level (L2) caches 803, 807, 813, 817 or 860 system memory via 865 chipset. One or more of the processors in Figure 8 may include or otherwise be associated with logic 819 to enable flexible configuration of the TDP specification techniques, in accordance with at least one embodiment.
    [0055] [0055] In addition to the FSB computer system illustrated in Figure 8, other system configurations can be used in conjunction with various embodiments of the invention, including point-to-point interconnected systems (P2P) interconnected ring systems. The P2P system in Figure 9, for example, can include several processors, of which only two processors, 970, 980, are shown as an example. Processors 970, 980 can each include a local memory controller center (MCH) 972, 982 to connect with memory 92, 94. Processors 970, 980 can exchange data via a 950 point-to-point interface ( PtP) 950 using PtP interface circuits 978, 988. Processors 970, 980 can each exchange data with a 990 chipset via individual PtP interfaces 952, 954 using point-to-point interface circuits 976, 994, 986, 998 The 990 chipset can also exchange data with a 938 high performance graphics circuit via a 939 high performance graphics interface. The modalities of the invention can be located within any processor having any number of processing cores or within the processing agents. PtP bus of Figure 9. In one embodiment, any processing core can include or otherwise be associated with a local cache memory (not shown). In addition, a shared cache (not shown) can be included on any processor outside both processors, still connected to the processors via the p2p interconnector, so that the local cache information from either or both Processors can be stored in the shared cache if the processor is placed in a low power mode. One or more processors or cores in Figure 9 may include or otherwise be associated with logic 919 to enable flexible configuration of the TDP specification techniques, in accordance with at least one embodiment.
    [0056] [0056] One or more aspects of, at least one modality, can be implemented by representative data stored in a machine-readable medium that represents or is coupled with various functionally descriptive and / or logic materials inside the processor, which when read by a machine makes the machine manufacture logic to perform the techniques described here. Such representations, known as "IP cores" can be stored in a machine-readable, tangible medium ("tape") and supplied to various buyers or manufacturing facilities to load onto the manufacturing machines that actually make the logic or processor.
    [0057] [0057] Modalities of the invention can be included or applied to any hardware device or portion thereof, including central processing units, graphics processing units or other logic or cores within a processor or in a computer system. The modalities can also be incorporated in a tangible, machine-readable medium having stored here in a set of instructions that if executed by a machine causes the machine to perform the operations described here.
    [0058] [0058] Therefore, a method and device for directing accesses from the microarchitecture memory region have been described. It is to be understood that the above description is intended to be illustrative and not restrictive. Many other modalities will become apparent to those skilled in the art by reading and understanding the above description. The scope of the invention, therefore, is determined with reference to the appended claims, along with the entire scope of equivalents to which such claims are entitled.
    权利要求:
    Claims (21)
    [0001]
    Processor characterized by the fact that it comprises: at least one new model-specific record (MSR) that supports a design thermal power (TPD) configurable to be specified for the processor; logic to change a configurable TDP value, including updating an average runtime power limit value (RAPL) as part of configurable TPD change, in response to a platform-facilitated user control trigger, where logic uses platform software to intercept the user control trigger and convert it to a basic input / output software (BIOS) call to cause the configurable TDP change and the platform is to facilitate a Power Interface notification and Advanced Configuration (ACPI) in an operating system to evaluate a Current Performance Capabilities (PPC) object.
    [0002]
    Processor, according to claim 1, characterized by the fact that the logic is to change the configurable TDP value in response to an exchange of power supply from alternating current (AC) to direct current (DC) or vice versa .
    [0003]
    Processor according to claim 1, characterized by the fact that the logic is to change the configurable TDP value, including a turbo ratio value, in response to a link event.
    [0004]
    Processor according to claim 1, characterized by the fact that the configurable TDP value is to change from an initially configured TDP value in response to the user control trigger.
    [0005]
    Processor according to claim 1, characterized by the fact that the configurable TDP value is to be changed in response to storage information in at least one model-specific record (MSR).
    [0006]
    Processor according to claim 1, characterized by the fact that changing the configurable TDP value causes a corresponding change in a target frequency of turbo mode.
    [0007]
    Processor according to claim 1, characterized by the fact that the TDP value is to change in response to a change in room temperature.
    [0008]
    System characterized by the fact that it comprises: a processor comprising: a plurality of logical processors, and at least one model-specific record (MSR) that supports a design thermal power (TPD) configurable to be specified for the processor; logic to change a configurable TDP value, including updating an average runtime power limit value (RAPL) as part of the configurable TPD change, in response to a user control, where the logic uses platform software to intercept user control and convert it to a basic input / output software (BIOS) call to cause the configurable TDP change, which causes a platform-facilitated notification to be issued on an operating system to evaluate a Capabilities object Performance Indexes (PPC) under each of the plurality of logic processors; and memory to store instructions to be executed by the processor.
    [0009]
    System according to claim 8, characterized by the fact that the logic is to change the configurable TDP value in response to an exchange of power supply from alternating current (AC) to direct current (DC) or vice versa .
    [0010]
    System according to claim 8, characterized by the fact that the logic is to change the configurable TDP value, including a turbo ratio value, in response to a link event.
    [0011]
    System according to claim 8, characterized by the fact that the configurable TDP value is to change from a TDP value initially configured in response to user control.
    [0012]
    System according to claim 8, characterized by the fact that the configurable TDP value is to be changed in response to storage information in at least one model-specific record (MSR).
    [0013]
    System according to claim 8, characterized by the fact that changing the configurable TDP value causes a corresponding change in a target frequency of the turbo mode.
    [0014]
    System according to claim 8, characterized by the fact that the TDP value is to change in response to a change in ambient temperature, ambient, thermal, acoustic or system conditions.
    [0015]
    Method characterized by the fact that it comprises: changing, through at least one model-specific record (MRS) for a processor, a design thermal power value (TDP), including updating an average runtime power limit value (RAPL) as part of the change of Configurable TPD, in response to user control; use platform software to intercept user control and convert it to a basic input / output software (BIOS) call to cause the configurable TDP change; and make an operating system, as part of the configurable TDP change, evaluate an Current Performance Capabilities (PPC) object from Power Interface and Advanced Configuration (ACPI) under each of a plurality of logic processors.
    [0016]
    Method according to claim 15, characterized by the fact that it still comprises changing the configurable TDP value in response to an exchange of power supply from alternating current (AC) to direct current (DC) or vice versa.
    [0017]
    Method according to claim 15, characterized by the fact that it further comprises changing the configurable TDP value, including a turbo ratio value, in response to a link event.
    [0018]
    Method according to claim 15, characterized by the fact that the configurable TDP value is to change from a TDP value initially configured in response to user control.
    [0019]
    Method according to claim 15, characterized by the fact that the configured TDP value is to be changed in response to storage information in at least one model-specific record (MSR).
    [0020]
    Method according to claim 15, characterized by the fact that changing the configurable TDP value causes a corresponding change in a target frequency of the turbo mode.
    [0021]
    Method according to claim 15, characterized by the fact that the TDP value is to change in response to a change in room temperature.
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    法律状态:
    2018-12-18| B06F| Objections, documents and/or translations needed after an examination request according art. 34 industrial property law|
    2019-10-01| B06U| Preliminary requirement: requests with searches performed by other patent offices: suspension of the patent application procedure|
    2020-10-27| B07A| Technical examination (opinion): publication of technical examination (opinion)|
    2021-02-23| B09A| Decision: intention to grant|
    2021-03-23| B16A| Patent or certificate of addition of invention granted|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 08/12/2011, OBSERVADAS AS CONDICOES LEGAIS. |
    优先权:
    申请号 | 申请日 | 专利标题
    US97410010A| true| 2010-12-21|2010-12-21|
    US12/974,100|2010-12-21|
    US13/118,183|2011-05-27|
    US13/118,183|US8984305B2|2010-12-21|2011-05-27|Method and apparatus to configure thermal design power in a microprocessor|
    PCT/US2011/064042|WO2012087598A2|2010-12-21|2011-12-08|Method and apparatus to configure thermal design power in a microprocessor|
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