system and method for managing power utilization

专利摘要:
SYSTEM AND METHOD FOR MANAGING ENERGY USE. The present invention relates to a system and method for managing the use of electrical energy. During a predetermined period of time, such as during power outage conditions, a digital signal processor (DSP) controls an IGBT / FET-based device to provide an allocated amount of power. When the amount of energy consumed exceeds the amount allocated, the DSP turns off the power. Alternatively, the system provides a signal to reduce the energy consumed. If sufficient charge has not been reduced after a predetermined amount of time, the power is turned off. Alternatively or in addition, the DSP can turn off power to predetermined electrical outputs, while supplying power to other electrical outputs, to reduce energy use to the predetermined amount. During other periods of time, the DSP controls the IGBR / FET device to provide a predetermined voltage that is less than the AC input line voltage. When the voltage drops below the predetermined voltage, such as during power failure conditions with excessive voltage drop, a microprocessor controls an electronic switch on the side of the (...) primary windings.
公开号:BR112013007674B1
申请号:R112013007674-7
申请日:2011-04-18
公开日:2020-11-10
发明作者:John L. Lumsden；Rafael E. Zaga
申请人:The Powerwise Group, Inc.；
IPC主号:

专利说明:

BACKGROUND OF THE INVENTION Field of the Invention
[001] This invention refers to the management of electrical power usage. Description of the Related Art
[002] Since the industrial revolution, world energy consumption has grown at a sustained rate. Most of the power generated and energy consumed comes from the combustion of fossil fuels, which is a non-renewable natural resource that is being rapidly depleted. As the depletion of Earth's natural resources continues, power generation and energy conservation has become an increasingly important issue with governments both in this country and abroad. In addition, companies and consumers are also concerned since the costs for these resources are increasing rapidly.
[003] Not only is there a worldwide concern with power generation and energy conservation, but there are also concerns about power distribution, especially in emerging economies. Although power generation and energy conservation are of great importance, the problem of power distribution is also of great concern since it involves the existing infrastructure that is usually inadequate to distribute power properly. In addition, it is not readily suitable for improvement.
[004] Electricity for residential and industrial use is typically generated at an electric power generation station, and sent through transmission lines in an electricity network to a distribution system, which transports electricity to the consumer. In several parts of the world, the supply of electrical power has not kept up with demand, often resulting in power failures with excessive voltage drops, and sometimes blackouts. A power failure with an excessive voltage drop is a voltage drop in the electrical power supply, often resulting in dimming of lighting when the voltage drops. Power failure voltages with an excessive voltage drop sometimes drop enough to stop devices or equipment from operating. These devices or equipment may suffer permanent damage as a result of the low voltage condition.
[005] In extreme cases when the demand for electrical power exceeds the supply, blackouts can occur. A blackout occurs when the supply voltage cannot be sustained in any way, or is reduced to a dangerously low level, such as causing electric motors to stop and overheat. Blackout hours are generally known to the electric company from historical records of heavy demand.
[006] A power failure with excessive voltage drop can be caused by (1) inadequate power generation, (2) insufficient power transmission capacity, and / or (3) insufficient power distribution capacity. Inadequate power generation and insufficient power transmission are easier to remedy than insufficient power distribution capacity. Both the demand for power generation and the power transmission capacity can be calculated and met comparatively easily within fiscal budgets.
[007] The main obstacle to providing sufficient power to consumers is insufficient power distribution capacity. The need for power distribution capacity cannot be easily planned or implemented economically. In addition, as the world's population grows, and industrial participation in the world economy increases, the power distribution infrastructure will be increasingly demanded or overloaded by the additional loads placed on it. Distribution problems can often be attributed to losses of copper within the cabling that forms the distribution infrastructure.
[008] Currently, government entities and energy companies try to remedy occurrences of power failures with excessive voltage drop by raising the AC voltage or adding power reduction to generation in appropriate locations in the power grid. This method usually results in a wide disparity of voltages available to consumers in homes and / or businesses. Voltage increases can vary from ten percent to fifteen percent (10% to 15%) and, since power is calculated by Voltage2 / load, the result of the “remedy” from government entities and energy companies can result higher consumer tariffs of up to twenty-five percent (25%). So, instead of conserving energy, government entities and energy companies are spending energy.
[009] Furthermore, although most appliances and equipment used in businesses and homes are capable of working, exactly to specification, at the nominal voltage minus ten percent (10%), most energy saving devices do not exploit this feature. Therefore, the potential for additional energy savings is often overlooked.
[0010] A transformer transfers electrical energy from one circuit to another through inductively coupled conductors. A variable current in the first windings or primary windings creates a variable magnetic flux in the transformer core, and therefore a variable magnetic field through the secondary windings. If a load is connected to the secondary, an electric current will flow in the secondary windings and electrical energy will be transferred from the primary circuit through the transformer to the load. The transformer ratio is the number of turns in the secondary windings to the number of turns in the primary windings.
[0011] The solution to the power distribution problem often used is to reinforce the voltage that arrives to allow sensitive devices to continue operating. One solution has been to use Variac type transformers driven by motor that continuously adjust the voltage to the rated voltage. However, this solution requires mechanical implementation that is susceptible to failure, a second solution has been to employ solid-state electronic intensifiers that continuously adjust the voltage to the rated voltage. However, this solution is expensive and inefficient. A third solution is to use relay-switched transformers. The problem with this solution is that the mechanical contacts are susceptible to failures with the high currents that are switched. Finally, manually switched transformers have been tried. This solution is undesirable because it requires a person to be monitored, and the transformer may be inadvertently left in a reinforcement position. Each of the above solutions has security, efficiency, cost, complexity and / or reliability problems. Past solutions using transformers and switching perform switching on the side of the secondary windings of the transformer, where high disadvantageous currents are present. There is also a disadvantageous current interruption with these previous solutions during the switching period.
[0012] US Publication No. 2009/0051344 proposes an energy saving device, system and method based on TRIAC / SCR in which a predetermined amount of voltage below a nominal line voltage and / or below a nominal voltage of device is saved. US Publication No. 2009/0200981 proposes a system and method for providing constant charging in AC power applications where at least one connection point of at least one half cycle of a modulation sine wave is determined, at least one is determined a disconnection point of the at least one half cycle of the modulation sine wave, and at least one slice located between the at least one connection point and the at least disconnection point is removed. U.S. Publication No. 2010/0033155 proposes a power source for IGBT / FET drivers that provides separate and isolated power for each IGBT / FET driver.
[0013] US Patent No. 6,489,742 proposes a motor controller that includes power transport for an induction motor with a digital signal processor that calculates and optimizes the current supply for existing motor loading from from a main power and voltage source through a control element. US Publication No. 2010/01 17588 proposes a motor controller to maximize energy savings in an AC induction motor at each load where the motor is calibrated at two or more load points to establish a control line, which is then programmed into a non-volatile memory of the motor controller. U.S. Publication No. 2010/0320956 proposes a closed-loop motor controller to reduce the supply voltage to an electric motor for mechanical horse when the motor must be generating power in open circuit mode.
[0014] U.S. Patent No. 6,489,742 and Nos. Publications. U.S. 2009/0051344; 2009/0200981; 2010/0033155; 2010/0117588; and 2010/0320956 discussed above are incorporated in full in this document by reference for all purposes.
[0015] There is a need for a system and method to manage energy use that reduces power failure with excessive drop in voltages, blackouts, and costs. BRIEF SUMMARY OF THE INVENTION
[0016] During a first predetermined period of time, such as when blackouts are not anticipated, a digital signal processor (DSP) controls an IGBT / FET-based device to provide a predetermined voltage that is less than the line voltage of AC input or mains input voltage. Phase input connections are provided to input analog signals to the device and system. A magnetic flow concentrator or current transformer determines the incoming analog signal and a zero volt crossover detector determines the zero volt crossover point of the signal. The positive half and negative half cycle of the signal is identified and forwarded to the DSP to process the signal. The signal is reduced by a trigger control through pulse amplitude modulation and the reduced amount of energy is supplied, thereby producing energy savings for an end user.
[0017] A microprocessor measures the AC input line voltage, and compares it with the predetermined voltage. When the AC input line voltage is greater than the predetermined voltage, the microprocessor controls a switch on the primary winding side of a transformer for shorting the primary windings. When the measured voltage is less than the predetermined voltage, and a voltage increase is required, such as during a power failure condition with excessive voltage drop, the microprocessor controls the switch to connect one end of the primary windings to the neutral, remove shorting the transformer and allowing the secondary voltage to be added to the AC input line voltage to provide a reinforced output voltage for the predetermined voltage across the direct output line on the side of the transformer secondary windings. The secondary windings are not switched.
[0018] During a second predetermined period of time, such as when blackout conditions are anticipated, the DSP controls the device based on IGBT / FET to provide an allocated amount of power. The DSP and / or the microprocessor monitors the power consumption, which can be displayed. When power consumption exceeds the allocated amount of power, the DSP can turn off power.
[0019] Alternatively, when the power consumed exceeds the allocated power, a signal can be sent alerting to the need to reduce the use of power. The signal can be audible, visible, or otherwise. The power consumer can reduce the load to meet the allocated power requirement. In one embodiment, wirelessly controlled electrical outputs can be used to selectively reduce the load in response to the signal. If the load has not been reduced properly after a predetermined amount of time, the DSP can turn off the power. The consumer can then reduce some load, and initiate a command to turn the power on. The command can be initiated by changing the condition of a switch, including manually and / or wirelessly. If the load has not yet been reduced properly after the power has been restored, then the DSP can again turn the power off. Alternatively, the DSP can provide another signal that can again alert you that the load has to be reduced. If the consumed power is not sufficiently reduced after a predetermined amount of time, then the DSP can switch off the power for the duration of the second predetermined period of time.
[0020] Additionally, when the consumed power exceeds the allocated power, alternatively the DSP can turn off the power for predetermined electrical outputs, while supplying power for other electrical outputs, to reduce the total power usage for the amount of power allocated.
[0021] Default consumer preferences can be implemented. The system can use wirelessly controlled electrical outputs that can be automatically turned off to meet the predetermined amount of power. The system can be monitored, operated and adjusted wirelessly. BRIEF DESCRIPTION OF THE FIGURES
[0022] In the following detailed description, reference will be made to the attached drawings in which:
[0023] FIGURE 1 is a block diagram of an IGBT / FET-based device and system for use in a three-phase electrical system.
[0024] FIGURE 2 is a plan view in perspective of a means of determination.
[0025] FIGURE 3 is a circuit diagram of a means of determination.
[0026] FIGURE 4 is a circuit diagram of a signal conditioning means.
[0027] FIGURE 5 is an oscillogram for a means of determining zero volt crossing point.
[0028] FIGURE 6 is a circuit diagram for a zero volt crossing point determination means.
[0029] FIGURE 7 is a circuit diagram of a means of detecting loss and means of determining rotation and phase rotation.
[0030] FIGURE 8 is a circuit diagram of a half-cycle identification means.
[0031] FIGURE 9 is an oscillogram of a half cycle identification means.
[0032] FIGURE 10 is an oscillogram of a half cycle identification means.
[0033] FIGURE 11A is a circuit diagram of the routing means.
[0034] FIGURE 11B is a continuation of the circuit diagram of FIGURE 11 A.
[0035] FIGURE 11C is a circuit diagram of a port programmer of FIGURES 11A and 1 IB.
[0036] FIGURE 11D is a circuit diagram of a resistance support of FIGURES 11A and 1 IB.
[0037] FIGURE 1 IE is a circuit diagram of a connector of FIGURES 11A and 1 IB.
[0038] FIGURE 12A is an oscillogram of a voltage reduction means.
[0039] FIGURE 12B is an oscillogram of an IGBT-based voltage reduction means of the invention.
[0040] FIGURE 12C is a circuit diagram of a voltage reduction means based on IGBT.
[0041] FIGURE 12D is a circuit diagram of a set of drive circuits for the IGBT-based voltage reduction means of FIGURE 12C.
[0042] FIGURE 12E is an oscillogram of a voltage reduction means based on the FET of the invention.
[0043] FIGURE 12F is a circuit diagram of a voltage reduction means based on FET.
[0044] FIGURE 12G is a circuit diagram of a set of drive circuits for the FET-based voltage reduction means of FIGURE 12F.
[0045] FIGURE 13 is a circuit diagram of a combined reset means and indicator means.
[0046] FIGURE 14A is a circuit diagram of a power supply unit for a supply medium.
[0047] FIGURE 14B is a continuation of the circuit diagram of FIGURE 14A.
[0048] FIGURE 15A is a circuit diagram of a communication medium.
[0049] FIGURE 15B is a circuit diagram of a USB interface of a communication medium of FIGURE 15A.
[0050] FIGURE 15C is a circuit diagram of an insulating block of a communication medium of FIGURE 15A.
[0051] FIGURE 15D is a circuit diagram of a first connector of a communication medium of FIGURE 15A on a digital signal processor.
[0052] FIGURE 15E is a circuit diagram of a second connector of a communication medium of FIGURE 15 A.
[0053] FIGURE 16 is a snapshot of an interface window.
[0054] FIGURE 17 is a snapshot of an interface window.
[0055] FIGURE 18A is a partial circuit diagram of a first modality of a voltage reinforcement device showing a transformer and an electronic switch with two solid state relays.
[0056] FIGURE 18B is a partial circuit diagram of a first embodiment of a voltage reinforcement device showing a DC power source.
[0057] FIGURE 18C is a partial circuit diagram of a first modality of a voltage reinforcement device showing a microprocessor.
[0058] FIGURE 19 is a partial circuit diagram of a second modality of a voltage reinforcement device showing the wiring arrangement for an exemplary 120V transformer.
[0059] FIGURE 19A is a partial circuit diagram of a second embodiment of a voltage reinforcement device showing the wiring arrangement for an exemplary 230V transformer.
[0060] FIGURE 19B is a partial circuit diagram of a second mode of a voltage reinforcement device showing DC power sources and related circuitry.
[0061] FIGURE 19C is a partial circuit diagram of a second mode of a voltage reinforcement device showing a microprocessor and two diode bridge circuits each connected to an IGBT device.
[0062] FIGURE 20 is a block diagram of a signal module connected to the DSP shown in FIGURE 1. DETAILED DESCRIPTION OF THE INVENTION
[0063] The terminology used in reference to the components numbered in FIGURES 1 to 17 is as follows: 1. device and energy saving system based on IBGT / FET, in general2. 3 phase input connection. magnetic flow concentrator4. analog signal conditioning device5. zero volt6 crossover point detector. missing phase detection device7. phase rotation device8. half cycle identifier9. logical device10. digital signal processor 11. A / D12 converter. power supply unit13. reset switch14. LED light15. IGBT / FET16 trigger control. computational device17. phase output connection18. neutral19. incoming energy20. analog signal21. zero volt crossing point22. positive half cycle23. negative half cycle24. reduced energy25. USB26 communication interface. circuit board27. receptacle28. conductor29. upper half of the receptacle30. bottom half of the receptacle31. articulation32. first filter33. second filter34. comparator35. Schmidt's buffer buffer36. absolute zero crossing signal37. magnetic flux concentrator microcircuit insert38. opening39. input sine wave 40. interface window41. main monitoring screen42. field in general43. operational mode44. phase field45. initialization field46. calibration field47. setpoint field48. indicators49. real time clock50. digital electricity meter51. Temporary buffer memory triggered by Schmidt52. voltage suppression device53. diode54. positive half cycle control transistor55. FET56. capacitor57. transformer58. negative half cycle control transistor59. First IGBT60 bypass control transistor. Second IGBT61 bypass control transistor. diversion device62. integrated circuit63. resistance64. split output generator65. optical isolator66. optically coupled driver67. First FET68 bypass control transistor. Second FET69 bypass control transistor. square wave70. operational amplifier71. isolator72. rectifier73. transistor74. USB75 port. Zener76 diode. first connector77. second connector78. inductor79. resistance support80. logical device connector81. linear voltage regulator82. positive half-cycle drive signal applied to the positive half-cycle control transistor83. negative half-cycle drive signal applied to the negative half-cycle control transistor84. trigger signal applied to the positive half cycle control transistor during the negative half cycle85. trigger signal applied to the negative half cycle control transistor during the positive half cycle86. trigger signal applied to the first IGBT bypass control transistor during the negative half cycle87. trigger signal applied to the second IGBT bypass control transistor during the positive half cycle88. trigger signal applied to the first FET offset control transistor during the negative half cycle89. trigger signal applied to the second FET deviation control transistor during the positive half cycle90. switching regulator
[0064] With reference to FIGURE 1, a block diagram of an energy saving device and system 1 for use in a three-phase electrical system is shown. The energy saving device and system 1 includes various components and means for reducing the amount of energy input where the reduced energy produces a minimal or virtually non-existent effect on the performance of an electronically operated device.
[0065] A predetermined amount of incoming energy 19 that has at least one analog signal 20 in it is input to the device and system 1 via an input means, which is preferably at least a phase 2 input connection. A line neutral 18 is also provided in device and system 1. As shown in FIGURE 1, system and device 1 are used in a three-phase electrical system that has more neutral ABC phases for use as a reference point and as a drain for an EMF of loop that is produced when the current in a capacitive power factor load is interrupted. However, the energy saving system 1 can also be used in a single-phase system and / or a two-phase system, where the only difference in structure is the number of phase 2 input connections (for example, in a single-phase system, only one phase 2 input connection is used in addition to a neutral connection (A) and in a two-phase system, two phase 2 input connections are used (A & B) in addition to a neutral connection).
[0066] At least one phase 2 input connection is connected to at least one means of determination, which is at least one magnetic flux concentrator 3 which determines the predetermined amount of incoming energy 19. It is also contemplated that at least one current transformer can be used instead of at least one magnetic flux concentrator 3 for all modes. The magnetic flux concentrator 3 galvanically isolates the current from the incoming energy 19 and reports any overcurrent conditions to a routing means, which is preferably at least one logic device 9. If there are any overcurrent conditions, then the conditions of overcurrent overcurrent are reported simultaneously to the logic device 9 and a processing medium, which is preferably a digital signal processor 10, in which the digital signal processor 10 immediately turns off the device and system 1. This electronic circuit breaker action is intended to protect the device and system 1 itself, as well as the terminal equipment used in conjunction with the device and system 1 in the event of a short circuit or overload. Therefore, logic device 9 provides full protection of power control devices in the event of a software / firmware failure and / or power line failure or overvoltage in real time since the reaction time of logic device 9 and processor of digital signal 10 is preferably 5ps. The logic device 9 arbitrates between the trigger signals applied to the IGBT / FET half-cycle control transistors 54 and 58 and the signals applied to the IGBT / FET bypass control transistors 59, 60, 67 and 68. Therefore, it avoids that those IGBT / FET 54 and 58 half-cycle control transistors and IGBT / FET 59, 60, 67 and 68 bypass control transistors are simultaneously triggered for an on condition that could lead to failure of the control and / or bypass elements of power. The digital signal processor 10 preferably includes at least one A / D converter 11.
[0067] Before reporting the phase current analog value of the phase 2 input connection to the digital signal processor 10, the magnetic flux concentrator 3 or current transformer first transmits the incoming energy 19 through at least one medium signal conditioning device, which is preferably at least vπsQ An analog signal conditioning device 4. After the signal (s) have been conditioned, a method which is described below, the conditioned signals are then sent for a zero volt crossing point determination means, which is preferably at least a zero volt crossing point detector 5, to detect the point where the AC voltage passes through zero volt relative to neutral 18, which it is commonly referred to as a zero crossing point.
[0068] After the zero crossing point is detected and using a three-phase electrical system, the conditioned signal then enters at least one loss detection means, which is preferably at least one phase detection device 6 and in at least one phase rotation and rotation determination means, which is preferably at least one phase rotation device 7, to thereby prepare the signal to properly enter into at least one half cycle identification means, which it is preferably at least one half-cycle identifier 8, and then in logic device 9 and digital signal processor 10. Details of half-cycle identifier 8 are discussed below.
[0069] The power control is performed through at least one voltage reduction means, which preferably includes at least one IGBT / FET 15 control control, in electrical connection with the digital signal processor 10 to reduce energy for a predetermined amount. Before the processed signals enter the reduction medium, however, the signals can again be conditioned via at least one analog signal conditioning device 4 to thereby clear a signal to remove any spurious or transient signals. The command signals for controlling the IGBT / FET 15 control of the voltage reduction medium are determined by the digital signal processor 10 and mitigated by the logic device 9.
[0070] The reduced energy 24 then enters at least one magnetic flux concentrator 3 or current transformer and then enters at least one output medium, which is preferably at least one phase 17 output connection, and is provided for an electrically operated device for consumption.
[0071] The system and device 1 are energized through a supply medium, which is preferably a power supply unit 12 in electrical connection with the digital signal processor 10. A reset medium, which is preferably a switch Reset 13, is preferably provided to allow a user to reset the device and system 1 as desired. In addition, an indicator means, such as a light-emitting diode 14, can be electrically connected to the reset switch 13 to thereby alert a user if the device and system 1 need to be reset.
[0072] The device and system 1 can optionally include at least one digital electricity meter 50 and at least one means of communication, such as a USB communication interface 25, capable of interfacing with at least one computing device 16 that has at least at least one USB port 74 and at least one interface window 40, via wired or wireless transmission. The USB 25 communication interface allows a user to monitor, display and / or configure the device and system 1 through their computer device 16. However, the inclusion of the USB 25 communication interface is not necessary in the implementation of the device and system 1. In addition, a real-time clock 49 can optionally be incorporated into the digital signal processor 10 or otherwise connected to the energy saving device and system 1.
[0073] A user can determine the operational way in which to use the energy saving device and system 1, for example, a user can select how he / she would like to save energy by either entering the desired RMS value, or entering the desired voltage percentage or enter the desired savings reduction percentage on a computational device 16. for example, if a user chooses to reduce the incoming voltage by a fixed percentage, the energy saving device and system 1 allows for such a reduction percentage of voltage and automatically reduces the voltage to be consistent with a maximum permitted harmonic content by establishing a lower voltage limit. The lower voltage limit ensures that in more low or power failure conditions with excessive voltage drop, the system and device 1 does not continue to try to reduce the available voltage by the specified reduction percentage.
[0074] FIGURE 2 is a plan view in perspective of a means of determination. The determining means, which is at least a magnetic flux concentrator 3 or at least a current transformer, measures galvanic AC current when connected to an active circuitry of the device and system 1 of the present invention. A receptacle 27, which is preferably made of plastic, includes an upper half of receptacle 29 and a lower half of receptacle 30 and a hinge 30 that connects the two halves 29 and 30, contains a circuit board 26 that has a chip magnetic flux concentrator microcircuits 37 mounted on the bottom side of the upper half of the receptacle 29. Each half 29 and 30 includes at least one chamfered part in which when halves 29 and 30 are joined, at least one opening 38 is formed to allow a conductor 28 to extend through it. The use of said receptacle 27 precisely defines the distance between the magnetic flux concentrator microcircuit insert 37 and the conductor core center 28. A window detector associated with the magnetic flux concentrator microcircuit insert 37 accurately determines when the current, within negative or positive half cycles, is outside normal ranges. In addition, the magnetic flux concentrator 3 uses an open collector Schmidt damper to allow multiple concentrators 3 to be connected to both the analog signal conditioning device 4 and the logic device 9.
[0075] The receptacle 27 fits and supports the conductor 28, which is preferably a cable, to ensure that the conductor 28 is firmly attached against the receptacle 27. The upper half of the receptacle 29 can be formed in various sizes so accommodate different wire measurements. A plurality of openings 38 of various sizes can be formed when halves 29 and 30 are fitted together to accommodate conductors 28 of various dimensions. The magnetic flux concentrator s provides galvanic isolation of incoming energy 19, performs accurate current measurement, is adaptable to any current range through the multiple cable passages located within receptacle 27, provides high voltage galvanic isolation, has zero harmonic distortion and excellent linearity. In addition, since the current measurement interval is determined mechanically, no change is required on the printed circuit board 26. The following equation determines the approximate sensitivity: Vout = 0.06 * 1 / (D + 0, 3mm)
[0076] where I = current in conductor 28 and D = the distance in mm from the top surface of the magnetic flux concentrator chip 37 to the center of conductor 28.
[0077] Since no electrical connection is made to the measurement target, complete galvanic isolation is obtained. In addition, there is zero insertion loss and therefore no heat is dissipated or energy is lost since there is no electrical connection made or a bypass or transformer is used.
[0078] FIGURE 3 is a circuit diagram of the determination medium. The magnetic flux concentrator 3 measures the magnetic flux generated when an alternating electric current flows within the conductor 28. Overcurrent is achieved by comparators 34 that form a window comparator. When the limits determined by resistors 63 are exceeded by an output of the magnetic flux concentrator 3, which can produce a "Current Hi" signal, open collector outputs from comparators 34 reduce and pass to logic device 9 and an input does not masking of the microprocessor to disconnect the device and system 1. To avoid ground loop problems, the magnetic flux concentrator s preferably includes an integrated circuit 62 that regulates the operating voltage of the magnetic flux concentrator 3 to 5V DC.
[0079] With reference to FIGURE 4, a circuit diagram of a signal conditioning means is shown. The signal conditioning means, which is preferably at least an analogue signal conditioning device 4, cleans or conditions a 50 / 60Hz sine wave analog signal to thereby remove any spurious signals or transient signals before transmission to the half-cycle identifier 8. If the sine wave has any noise or distortion of sufficient amplitude, this can, under certain circumstances, give rise to false zero crossing detections. Therefore, the inclusion of this analog signal conditioning device 4 is of importance.
[0080] To properly condition the sine wave signal, operational amplifiers 70 are used. An operational amplifier 70 is configured as a second-order active low-pass filter to remove or reduce harmonics and any transients or interference signals that may be pre-sent. When using such a filter, however, group delay occurs in which the group delay displacements, in time, the zero crossing of the filtered signal from the real zero crossing point of the incoming AC sine wave. To remedy the delay, operational amplifiers 70 are provided to allow the phase shift necessary to correct the zero crossing point precisely in time as required. The output of the operational amplifiers 70 is the fully conditioned 50/60 Hz sine wave signal that is connected to the A / D converter 11 of the digital signal processor 10 (see FIGURE 1) for measuring the root value of the mean square value ( RMS). This signal is exactly half of the supply output which is required to enable both positive and negative half-cycle measurement. The A / D converter 11 performs the well-known 2s complement math to enable it and requires the AC signal to deviate both positively and negatively with respect to the center or divided output voltage. The signal also enters the half-cycle identifier 8.
[0081] FIGURES 5 and 6 show an oscillogram and circuit diagram, respectively, for a zero volt crossing point determination means. The zero volt crossing point determination means, which is preferably at least one zero volt crossing point detector 5 in which the zero crossing point 21 is precisely determined. An operational amplifier 70 is configured as a comparator 34 with its reference at exactly half the supply voltage using half of the supply output. A comparator 34 operates at a very high gain and, as a result, switches within a few milliliters of the divided output voltage.
[0082] Additional conditioning of the zero crossing signal is carried out additionally by a Schmidt damper 35. Subsequent to further signal processing, a very precise square wave 69 is produced at a few millivolts from the actual zero volt crossing point 21 of the sine wave.
[0083] FIGURE 7 shows a circuit diagram of a means of detecting loss and means of determining rotation and phase rotation. The loss detection means, which is preferably at least one phase detection device 6, and the phase rotation and rotation determination means, which is preferably at least one phase rotation device 7, work together in order to properly prepare the signal for transmission in the logic device 9 and digital signal processor 10 when using a three-phase electrical system. The missing phase detection device circuitry 6 includes operational amplifiers 70 configured as comparators 34 where each uses a high value of resistors in series, which comprises two resistors of 0.5 Meg Ohm in series, which is necessary for achieve the required working voltage of resistors 63, and two diodes 53 connected in reverse parallel. The diodes 53 are centered around the zero volt crossing point 21 of the input sine wave 39 at approximately the direct voltage drop of the diodes 53, which is in turn applied to comparator 34 which additionally conditions the appropriate signal to pass to logic device 9 and digital signal processor 10, which results in the system being turned off in the absence of any of the signals.
[0084] In a three-phase electrical system, the phase rotation can be either A-B-C or A-C-B. to enable the digital signal processor 10 to function properly, the phase rotation must first be determined. Comparators 34 are used to detect zero volt crossing point (s) 21 and report point (s) 21 to digital signal processor 10. Digital signal processor 10, in turn, it does the rotational timing through the timing logic. Each of the operational amplifiers 70 acts as a simple comparator 34 with the input signal, in each case provided by the pairs of inverse parallel diodes 53 together with the series resistors 63.
[0085] FIGURES 8, 9 and 10 show a circuit diagram and oscillograms, respectively, of a half cycle identification means. The half-cycle identification means, which is preferably at least one half-cycle identifier 8, provides additional data for the logic device 9 and digital signal processor 10 by identifying whether the half-cycle of the analog signal is positive or negative. This is of great importance to avoid a situation where if the IGBT / FET half-cycle control transistors 54 and 58 and the IGBT / FET bypass control transistors 59, 60, 67 and 68 are connected simultaneously, a short- circuit through the input power.
[0086] Operational amplifiers 70, which are configured as window comparators 34, have separate switching limits determined by at least one resistor 63. As shown in FIGURE 9, there are three signals, an absolute zero crossing signal 36 and two coincident signals in which a coincident signal has a positive half-cycle 22 and a coincident signal has a negative half-cycle 23 of an input sine wave 39. The design allows the window to be adjusted to provide, when required, the "band dead."
[0087] With reference to FIGURES 11 A, 11B, 1 1C, 11D and 11E, circuit diagrams of the routing means are shown. The routing means, which is preferably at least one logic device 9, works in real time, outside of the digital signal processor 10, to arbitrate between the connected times of the IGBT I FET 54 and 58 half-cycle control transistors and the IGBT I FET 59, 60, 67 and 68 bypass control transistors.
[0088] The logic device 9 performs the routing function to ensure that all signals are appropriate for the instantaneous demand and polarity of the input sine wave 39 and performs the function of pulse amplitude modulation to thus ensure the safe operation of the energy saving device and system 1, regardless of the state of the digital signal processor 10, presence of noise, interference or transients. The circuitry of isolator 71, as shown in FIGURE 11C, allows programming of logic device 9. The circuitry of resistor support 79 of logic device 9, as shown in FIGURE 11 D, is required to operate the logic device. 9. As shown in FIGURE 11E, the logic device connector circuitry 80 enables the activation and deactivation of certain aspects of logic device 9.
[0089] Dealing with a resistive load is much less demanding than dealing with a reactive load, in particular, an inductively reactive load. Currently, pulse amplitude modulation (PWM) is defined as modulation of a pulse carrier in which the value of each instantaneous sample of a modulation wave produces a pulse of proportional duration varying the front, rear, or both edge of a pulse and which is also known as pulse duration modulation. However, for the purposes of this invention and application, PWM is defined as the modulation of a pulse carrier in which at least one slice is removed from an area under the curve of a modulation wave. When PWM is applied directly to the incoming power, the inductive component reacts when power is removed and tries to keep the current flowing and will raise its self-generated voltage until the current finds a discharge path. This circumstance, without the bypass circuitry, must destroy the half-cycle control transistors.
[0090] Therefore, logic device 9 is a "supervisor" in which it takes the appropriate actions in case the digital signal processor 10 "locks up", if there is an overcurrent condition or if there is a phase loss. In any of these situations, the logic device 9 responds immediately, in real time, to protect the half-cycle control transistors and bypass devices and the equipment connected to them.
[0091] Additionally, logic device 9 mitigates the complex drive requirements of IGBT / FET half-cycle control transistors 54 and 58 and IGBT / FET bypass control transistors 59, 60, 67 and 68 and to some extent , unloads the digital signal processor 10 for this task. Since the logic device 9 controls this function, it can be performed in real time and, therefore, the timing control of the triggering requirements can be maintained at much stricter limits than would be achieved by the digital signal processor 10. The ability to respond in real time is important for the reliable and safe operation of the energy saving device and system 1 of the present invention.
[0092] FIGURES 12A, 12B, 12C, 12D, 12E, 12F and 12G show oscillograms and circuit diagrams of a voltage reduction means. The voltage reduction means, which preferably includes at least one IGBT / FET 15 trigger control, reduces the analog signals of the input sine wave 39, which is the amount of energy input to the device and energy saving system 1, by pulse amplitude modulation in which at least one slice is removed from an area under the curve of the modulation sine wave 39, to thereby reduce energy and without the present harmonics associated previously with such voltage control. This technique, as shown in FIGURE 12 A, works in conjunction with the inherent characteristics of IGBT / FET devices that allow the switch-on trigger point to be controlled. All potential energy is contained in each half cycle and, in the case of a complete half cycle, it has the largest area under the curve. If each half cycle is modulated by a 90% space ratio mark, the area under the curve is reduced by 10% and, as a result, the energy is reduced proportionately as seen in FIGURE 12A.
[0093] The original shape of the input sine wave is retained and, once the modulation can be done high, possibly 10's of KHz, filtering the output is possible due to the smaller size of the coiled components becoming a practical proposition. The general effect is realized when the root value of the mean square value (RMS), which is the square root of the average time of the square of a quantity or, for a periodic quantity, the average is taken over a complete cycle and at which is also referred to as the effective value, is measured correctly and the output voltage is seen to be reduced by a similar percentage for the used space ratio mark. The reduced voltage results in reduced current, thus resulting in reduced power consumed by an end user.
[0094] Since IGBT and FET devices are unipolar in nature, in the case of AC control, it is necessary to provide at least one IGBT / FET 15 control control to control each half cycle.
[0095] In addition, to avoid reverse polarization, targeting diodes are used to route each half cycle to the appropriate device. In addition, many IGBT and FET devices have a main parasitic diode bypass element in which they connect two IGBT or FET devices in inverse parallel should result in having two of the parasitic diodes in reverse parallel, thus rendering the arrangement inoperative as a control element.
[0096] Diodes 53 are connected via the positive half-cycle control transistor 54 and the negative half-cycle control transistor 58 and work ideally for a purely resistive load or a current-driven reactive load. However, when driving a load with a current delay power factor, when the current in an inductively reactive component is suddenly removed, as is the case when modulation occurs, the falling magnetic field tries to keep the current going, similar to an electronic command, and produces an EMF that will rise in voltage until it finds a discharge path that will enable the release of energy. With this arrangement, this "return EMF" will cause active components of the half-cycle control element to fail. To prevent this from happening, additional IGBT / FET bypass control transistors 59, 60, 67 and 68 are placed in a bypass configuration.
[0097] During the positive half cycle, the positive half cycle control transistor 54 modulates and a diode 53 is active during the complete positive half cycle. The second IGBT bypass control transistor 60 is turned on completely and a diode 53 is active. Therefore, any voltages of opposite polarity that result from the load return EMF are automatically blocked.
[0098] During the negative half cycle, the other devices comprised in series and bypass networks are activated in a similar way.
[0099] During switching transitions, a peak can be pre-sent which can last a very short period of time. The peak is blocked by voltage suppression devices 52, which are able to absorb large amounts of energy for a very short period of time and enable very fast response time. Voltage suppressor devices 52 also block any transient network flow signals due to lightning or other sources that could otherwise damage the active components of half-cycle transistors or bypass transistors. Additionally, while each half-cycle transistor is modulating the pulse amplitude, the other half-cycle transistors are turned on fully for the precise half-cycle duration. The functions of these half-cycle transistors reverse during the next half-cycle. This process provides complete protection against the return EMF signals discussed above. This arrangement is necessary, especially close to the zero crossing time when both bypass elements are in transition.
[00100] Each of the IGBT / FET half-cycle control transistors 54 and 58 and the IGBT / FET bypass control transistors 59, 60, 67 and 68 have isolated port characteristics that require devices to be upgraded to enable them. call them. This improvement voltage is preferably 12 Volts in magnitude and is preferably supplied by a floating power source, preferably one for each pair. This is only possible once the IGBT / FET devices are operated in the common emitter mode in the case of the IGBTs and in the common source mode in the case of the FETs; otherwise, four isolated power sources are required for each phase. Each pair requires a separate drive signal which is provided by the optically isolated coupled actuators 66. These actuators 66 make use of the isolated sources and serve to turn each power device on and off very quickly. These actuators 66 are active in both directions, which is necessary since the input capacitance of the power devices is high and must be actively discharged quickly at the switch-off point and quickly charged at the switch-on point.
[00101] The problem with direct pulse amplitude modulation is when driving a reactive load inductively as when the IGBT stops modulating, there is a return EMF that needs to be blocked. With reference to FIGURE 12B, an input sine wave 39 is shown that is applied to the positive half-cycle control transistor 54 and to the negative half-cycle control transistor 58. Typically, these half-cycle control transistors 54 and 58 are in "off condition" and need to be triggered. During the positive half cycle, the positive half cycle control transistor 54 is modulated and works in conjunction with a diode 53 to pass the modulated positive half cycle to a line output terminal. The second IGBT bypass control transistor 60 stays on for the duration of the half cycle and operates in conjunction with a diode 53 to block the return EMF to earth. During the positive half cycle, the negative half cycle control transistor 58 fully on and its on condition is supported by a diode 53. These diodes 53 perform the proper direction of the signals.
[00102] Due to the modulation of the positive half cycle, a return EMF signal occurs. Since the negative half-cycle control transistor 58 is on during this time, the negative feedback EMF is passed through a diode 53 to be blocked at the simultaneous positive AC half-cycle voltage.
[00103] Although no modulation is applied to the first IGBT bypass control transistor 59 and the second IGBT bypass control transistor 60, these transistors 59 and 60 work in conjunction with diodes 53 in a similar manner to that described above.
[00104] As shown in FIGURE 12B, which is an oscillogram of the IGBT-based device's voltage reduction medium, during positive half cycle 22, a drive signal is applied to negative half cycle control transistor 85 and a signal The trigger signal is applied to the second IGBT 87 bypass control transistor. During negative half cycle 23, a trigger signal is applied to the positive half cycle control transistor 84 and a trigger signal is applied to the first IGBT bypass control transistor. deviation from IGBT 86. The positive half-cycle drive signal 82 applied to the positive half-cycle control transistor 54 and the negative half-cycle drive signal 83 applied to the negative half-cycle control transistor 58 are also shown.
[00105] Similarly, as shown in FIGURE 12E, which is an oscillogram of the voltage reduction means of the FET-based device, during the positive half cycle 22, a drive signal is applied to the half cycle control transistor negative 85 and a drive signal is applied to the second FET offset control transistor 89. During negative half cycle 23, a drive signal is applied to the positive half cycle control transistor 84 and a drive signal is applied to the first FET bypass control transistor 88. The positive half-cycle drive signal 82 applied to the positive half-cycle control transistor 54 and the negative half-cycle drive signal 83 applied to the negative half-cycle control transistor 58 also They are shown.
[00106] In summary, two blocking strategies are used, the first for the positive half cycle and the second for the negative half cycle. During the positive half cycle, when the positive half cycle control transistor 54 is modulated, the negative half cycle control transistor 58 and the second bypass control transistor 60 are on. During the negative half cycle, when the negative half cycle control transistor 58 is modulated, the positive half cycle control transistor 54 and the first IGBT bypass control transistor 59 are on.
[00107] The hardware used in the device and energy saving method based on IGBT and based on FET 1 of the present invention is identical with the only difference being the IGBT / FET half-cycle control transistors 54 and 58 and the control transistors deviation IGBT / FET 59. 60, 67 and 68. The circuit diagram of the IGBT FIGURE 12C circuitry and the IGBT FIGURE 12D-based driver and the FET FIGURE 12E-based circuitry and the based driver in FET FIGURE 12F are shown for comparison purposes.
[00108] With reference to FIGURE 13, a circuit diagram of a combined reset means and indicator means is shown. The reset means, which is preferably at least one reset switch 13, and the indicator means, which is preferably at least one light emitting diode 14, work together to indicate when the energy saving device and system is based in IBGT / FET 1 are not working properly and to allow a user to reset the device and system 1 when necessary.
[00109] Preferably, LED light 14 will indicate that the device and system 1 are working properly by flashing on / off. When in a fault condition, the LED 14 preferably changes to a non-uniform pattern that is immediately obvious and recognizable as a fault condition.
[00110] FIGURES 14A and 14B are a circuit diagram of a power supply unit 12 of a supply medium. The power supply, which is preferably at least one power supply unit 12, accepts a variety of inputs, including, but not limited to, single-phase operation 80 Vrms to 265 Vrms, two-phase 80 Vrms 3 600 Vrms, three-phase 80 Vrms 3,600 Vrms and 48 Hz to 62 Hz.
[00111] The power supply unit 12 is completely isolated and doubly regulated in design. At the input, a rectifier 72 composed of diodes 53 receives mono, bi and three-phase power. The power is applied to a switching regulator 90 and integrated circuit 62 via a transformer 57. In view of the high voltages that exist through the DC terminals, the switching regulator 90 and integrated circuit 62 are supplemented by a FET 73 transistor used in a StackFET configuration in order to increase your working voltage. The secondary transformer 57 has a diode 53 and a reservoir capacitor 56. The DC voltage through capacitor 56 is passed through the network resistors 63 and a Zener diode 75 to an optical isolator 65 and finally to the supply terminals . Using the optical isolator 65 ensures galvanic isolation between the supply input and output (6.4V DC). Finally, the output of the linear regulators 81 (3.3 VA DC) is passed to an operational amplifier 70, which is configured as a unit gain damper with two resistors 63 that determine the divided output voltage. The main neutral is connected to this point of the split output and also to a zero Ohm resistance. An inductor 78 isolates the digital supply (+ 3.3V) output from the analog (3.3 VA) and reduces noise.
[00112] Next, FIGURES 15A, 15B, 15C, 15D and 15E show the circuitry of a communication medium. The communication medium, which is preferably at least a USB 25 communication interface, allows a user to monitor and determine the parameters of the energy saving device and system 1 of the present invention as desired.
[00113] The circuitry of a USB 25 communication interface is shown in FIGURE 15B, an isolator block 71 used in the isolation of the USB 25 communication interface of digital signal processor 10 is shown in FIGURE 15C and first and second connectors 76 and 77 for connecting the communication medium to the digital signal processor 10 are shown in FIGURES 15D and 15E.
[00114] Since the main printed circuit board is not isolated from the neutral, it is necessary to galvanically isolate the USB 25 communication interface. It makes use of the built-in serial communication feature of the digital signal processor 10 to communicate serially with the communication medium 46. Signals, on the user side of the isolation barrier, are applied to an integrated circuit 62, which is a device that receives serial data and transforms them into USB data for direct connection to a computing device 16 via a USB host port 74. The 5V power of the host USB is used to power the communication medium 46 and avoids the need to supply isolated power from the unit. Preferably, there are two activity light-emitting diodes 14, which indicate activity on the TX (transmit) and RX (receive) channels. The communication preferably operates at 9600 Baud, which is adequate in view of the small amount of data passed.
[00115] Although the inclusion of a means of communication is not necessary in the performance of the device and energy saving system 1, it is a feature that allows easier use of the device and system 1.
[00116] Finally, with reference to FIGURES 16 and 17, snapshots of an interface window 40 of the present invention are shown. Interface window 40 is displayed on computing device 16 and allows a user to monitor and configure the device and energy saving system 1 as desired. A main monitoring screen 41 is provided which has a plurality of fields 42 in which an end user can adjust the energy saving device and system 1. For example, fields 42 can include an operational mode field 43, a phase 44, an initialization field 45, a calibration field 46 and a setpoint field 47.
[00117] In operational field 43, a user can select the way in which he wants to save energy. Ways include percentage of voltage reduction at which the output Volts are adjusted by a fixed percentage, percentage of savings reduction at which the output Volts are intended to achieve a percentage of savings and voltage regulation at which the root of the Average square value of output Volts is a pre-configured value.
[00118] The phase field 44 allows a user to select the types of phase used in connection with the device and energy saving system 1, that is, single-phase, two-phase or three-phase.
[00119] Boot field 45 allows a user to configure the system and device 1 to start randomly and / or to have a "light start" or delay in which the user enters the delay time in seconds in which the system and device will start.
[00120] Calibration field 46 allows a user to enter the desired precise calibrations and / or to rotate the phases.
[00121] The setpoint field 47 displays the settings selected by the user and shows the amount of energy saved using the device and energy saving system 1 as a voltage regulator, percentage of voltage reduction or percentage of energy saving reduction energy. With respect to the percentage of voltage reduction, the lower RMS limit is determined below the incoming voltage passed through it to allow the incoming voltage to be passed through when it is less than or equal to the lower voltage limit. With respect to the savings reduction percentage, the lower RMS limit is determined below the incoming voltage passed through it.
[00122] Indicators 48 are provided in interface window 40 and display operating current, operating voltage, line frequency, calculated energy savings and phase rotation.
[00123] A real time clock 49 can be incorporated in the interface window 40 to allow the programming of additional voltage reduction for a predetermined time and a predetermined operational time, for example, by seasons, days of the week, hours of the day, for a predetermined operating time. In addition, a user can program the device and energy saving system 1 to operate several hours a day. The real-time clock 49 is configured via the communication or fixed port to allow the selection of set seasonal dates and times when, from experience, it is known to exhibit overload of the power grid. During these hours, the system allows further reduction of the regulated AC voltage, in order to reduce the load on the network. Multiple hours can be defined each with its own percentage of reduction or additional voltage drop.
[00124] The digital electricity meter 50 provides a means to record statistical data on the use of power, power factor and overvoltages. The digital electricity meter 50 also provides the ability to include capacitors for power factor correction, operate in mono, bi and three-phase systems and operate at all voltages around the world. It can be used remotely or locally to disable or enable the user's power source at will by the power supplier. In addition, the digital electricity meter 50 can detect when the energy saving device and system 1 has been bypassed by an end user trying to avoid paying for the energy consumption in which the power supplier is alerted to this abuse. Finally, the use of the real-time clock 49 allows a user and / or power supplier to reduce power consumption at selected times in a day or for a selected period of time, thereby alleviating and / or eliminating failure conditions power supply with excessive voltage drop.
[00125] FIGURES 18A to 18C taken together show a first modality of a voltage reinforcement device 30 'configured for square root of the average voltage 220/230 (Vrms). The voltage reinforcement device 30 'can also be configured for 120/127 Vrms. FIGURE 18A shows transformer 41 'and switch 16'. Switch 16 'comprises first relay 20' and second relay 22 '. FIGURE 18B shows the power source 24 '. FIGURE 18C shows microprocessor 26 '. Moving on to FIGURE 18A, secondary windings 2A and 2B of transformer 41 'are in series between the direct input line terminal 6' and the direct output line terminal 8 '. Direct input line 34 'to direct output line 36' passes through the secondary windings of transformer 2A and 2B always, and is not switched. To configure for 120/127 Vrms, then the secondary windings 2A and 2B must be in parallel. Alternatively, the transformer can be a single voltage type specifically for 230 V, 120 V, or any other voltage range.
[00126] The primary windings of transformer 10A and 10B have first end or first line 12 'connected to the direct input terminal 6' and the second end or second line 14 'connected through connector F2 with electronic switch 16'. Switch 16 'allows the second line of transformer 14' or (1) to connect with the first line 12 'of primary windings of transformer 10A, 10B, thereby shorting transformer 41', or (2) to connect to neutral line 18 '. The connectors (F1, F2, F3) are Fasten type connectors. The connectors (F1, F2, F3) allow the removable connection on transformers of different rated currents allowing greater or lesser loads. Other types of connectors are also contemplated.
[00127] When the second line of primary windings of the transformer 14 'is switched to neutral, the secondary voltage is added to the input voltage of the network, in order to thereby provide increased or increased output voltage at the direct output terminal 8'. An electrical charge can be connected to the direct output terminal 8 ', such as a residential, commercial or industrial charge. The winding voltage is phased to be additive to the incoming AC line voltage, so as to provide reinforced voltage when necessary. When the microprocessor 26 'switches to increased or reinforced voltage, the reinforced voltage can be maintained at the incoming Vrms multiplied by the percentage ratio of the transformer's turn ratio.
[00128] When switch 16 'is switched to the other condition, state, or position, removing the connection of the second line 14' of neutral and connecting it with the first line 12 ', the primary windings of transformer 10A and 10B are short-circuited. Creating a short circuit in the unreinforced condition or state, transformer 41 'is disconnected and does not consume any power. Also, since primary 10A and 10B is short-circuited, and secondary 2A and 2B is permanently connected between input terminal 6 'and output terminal 8', there will be substantially no reactive current components on the secondary side. and therefore, substantially no inductive reactive loss will be incurred during unreinforced operation. The only impediments to the passage of AC power from direct input 6 'to direct output 8' will be the very small ohmic resistance of copper or other windings of secondary windings 2A and 2B.
[00129] Switching is advantageously carried out on the primary side of the transformer (10A, 10B). Although switching can take place on the secondary side (2A, 2B) of transformer 41 ', disadvantageous high currents should be pre-sent. Since transformer 41 'can have a ratio of ten (10) to one (1), only one tenth of the current would need to be switched on the primary side (10A, 10B) of transformer 41'. Other transformer reasons are also contemplated. The transformer ratio is the number of turns on the secondary (2A, 2B) to the number of turns on the primary (10A, 10B). In all modalities, this technique of connecting the primary side allows the use of smaller and more reliable switches for lower current, such as relay devices 20 'and 22', when compared to much more expensive devices if switching occurred on the secondary side (2A, 2B) of transformer 41 '. Also, switching on the primary side advantageously provides no power interruption during the switching period. Although two relay devices 20 'and 22' are shown, it is also contemplated that there may be more than two devices (20 ', 22').
[00130] The 24 'power source (FIGURE 18B) can supply power to the 16' switching network and 26 'microprocessor. A small, inexpensive five (5) volt DC power source can be employed to power the 16 'switch and / or microprocessor 26', although other power and voltage sources are also contemplated, including alternating current. The devices 20 'and 22' (FIGURE 18A) can each consist of an optically coupled actuator in communication with a small TRIAC device, in order to form two solid-state AC relays. Opiac electronically isolated (opto) Triac triggers using opto isolated TRIACS (OT1, OT2) are contemplated. Other types of relays are contemplated. It is also contemplated that the voltage can be controlled through the use of other power control devices, including TRIACs, SCRs, IGBTs, and / or MOSFETs.
[00131] The microprocessor 26 '(FIGURE 18C) measures the AC input line voltage, as in lines 34' or 28 ', and decides the voltage level at which the increased voltage can be used. Other types of processors are also contemplated. Three bridge blocks or small 32 '3x2 collectors may allow the selection of the six (6) voltages as shown below in Table 1 and FIGURE 19C: TABLE 1: VOLTAGE SELECTION BRIDGE

[00132] Other predetermined voltage configurations are also contemplated. Other quantities of bridge blocks or collectors 32 'are also contemplated. The microprocessor 26 'operates and controls the relay devices 20' and 22 'according to the selected voltage.
[00133] The microprocessor 26 '(FIGURE 18C) measures the AC input line voltage. The microprocessor 26 'uses detection of the zero crossing point of the incoming AC mains voltage. This zero crossing detection is used to ensure correction of the switching timing of solid state relays 20 'and 22'. Zero crossover timing eliminates the possibility of both relays 20 'and 22' being connected at the same time. FIGURES 5 and 6 propose an oscillogram and circuit diagram, respectively, of a means of determining the zero volt crossing point that is contemplated. Other types of zero volt crossing point determination means are also contemplated. Hysteresis can be used to eliminate any erratic switching around the limit point configured by bridges 32 '.
[00134] In FIGURES 18A to 18C, components R1 to R23 are resistors, components C1 to C8 are capacitors, components D1 to D3 are diodes, component D4 is a Zener diode, components D5 and D10 are light emitting diodes light, component T1 is a transformer, components T2 and T3 are voltage suppression devices, component Q1 is an NPN transistor, component U1 is a switching regulator, components TR1 and TR2 are TRIACs, components OT1 and OT2 are opto isolated TRIACs, and component J1 is a bridge block or 1 x 5 collector.
[00135] FIGURES 19 to 19C taken together show a second embodiment of a voltage reinforcement device 54 '. FIGURE 19 shows the exemplary 120 Volt transformer 66 '. FIGURE 2A shows the exemplary 230 Volt transformer 68 '. Wiring arrangements are different in FIGURES 19 and 19A. The windings for the 66 '120 Volt transformer (FIGURE 19) are in parallel, and the windings for the 68' 230 Volt transformer (FIGURE 19A) are in series. The same 66 ', 68' transformer can be used for 120 Volts and 230 Volts by configuring the wiring arrangements as shown: parallel for 120 Volts and series for 230 Volts. However, different transformers 66 ', 68' can also be used. The transformer can be a single voltage type specifically for 230 V, 120 V, or any other voltage range. Other transformers with different current ratings are also contemplated. Only one of these transformers 66 ', 68' should be connected to the system at a time. FIGURE 19B shows two isolated DC power sources (50 ', 52'), the 63 'power source, and the 64' power source regulation circuitry. FIGURE 19C shows microprocessor 56 'and IGBT switching device 58'. Switch 58 'comprises diode bridge of first circuit U7, first circuit IGBT 60', second diode bridge of circuit U8, and second circuit IGBT 62 '.
[00136] Moving on to FIGURE 19, the secondary windings 72A and 72B of 120 Volt transformer 66 'are in parallel between the direct input line terminal 78' and the direct output line terminal 80 '. Direct input line 74 'to direct output line 76' passes through the secondary windings of transformer 72A and 72B always, and is not switched. Primary windings 70A and 70B of transformer 66 'have first end or first line 82' connected to direct input terminal 78 'via connector F5, and second end or second line 84' connected via connector F14 with electronic switch 58 ' . The switch 58 'allows the second line 84' of the transformer 66 'or (1) to connect with the first line 82' of the primary windings 70A, 70B of the transformer 66 ', thereby shorting the transformer 66', or ( 2) connect with the 90 'neutral line. Connectors F4 to F17 are Faston type connectors. The connectors (F1 to F17) allow removable connection or connection of transformers of different classifications (66 ', 68'), such as 120V and 230V. Other types of connectors are also contemplated.
[00137] In FIGURE 19A, the 230V 68 'transformer, like the 120V 66' transformer, can be removably connected or disconnected on the same connectors (F1 to F17). However, the wiring arrangement for transformer 68 'is different. Other wiring and connection arrangements are also contemplated. The secondary windings 92A and 92B of transformer 68 'are in series between the direct input line terminal 78' and the direct output line terminal 80 '. Direct entry line 85 'passes through connector F8 to terminal 78'. Direct output line 87 'passed through connector F11 to terminal 80'. Direct input line 85 'to direct output line 87' passes through the secondary windings of transformer 92A and 92B always, and is not switched. Primary windings 94A and 94B of transformer 68 'have the first end or first line 96' connected to the direct input terminal 78 'via connector F5, and the second end or second line 98' connected via connector F14 with the electronic switch. 58 '. Switch 58 'allows the second line 98' of transformer 68 'or (1) to connect with the first line 96' of primary windings 94A, 94B of transformer 68 ', to thereby short circuit transformer 68', or ( 2) connect with the neutral line 90 '.
[00138] As can be understood now, the same transformer can be used for 120 V and 230 V, with the connections shown in FIGURES 19 to 19A setting the transformer to 120 V (FIGURE 19) or 230 V (FIGURE 19 A) as wanted. When the primary windings of the second line of transformer 84 ', 98' are switched to neutral, the secondary voltage adds to the input voltage of the network, to thereby provide enhanced output voltage at the direct output terminal 80 '. An electrical charge can be connected to the output terminal 80 '. The winding voltage is phased to be additive to the incoming AC line voltage, in order to provide increased voltage when necessary.
[00139] When switch 58 'is switched to the other state or condition, removing the connection of the second line of primary windings 84', 98 'from the neutral and connecting it with the respective first line 82', 96 ', the windings primary transformers (70A, 70 B) or (94A, 94B) are short-circuited. By creating a short circuit in the unreinforced position, the transformer is disconnected and does not consume any power. Also, since the primary is short-circuited, and the secondary is permanently connected between the direct input terminal 78 'and the direct output terminal 80', there will be substantially no reactive components of the current on the side of the secondary windings and therefore substantially no reactive loss inductively during unreinforced operation. The only impediments to the passage of AC power from input 78 'to output 80' will be the very small ohmic resistance of copper or other windings of the secondary windings. As with the first mode, switching is carried out advantageously on the primary side of the transformer, which allows switching with less current. Also, there is substantially no power interruption during the switching period.
[00140] Moving on to FIGURE 19B, three independent power sources (50 ', 52', 63 ') can supply power to the switching network 58' and / or microprocessor 56 '. The first power source 50 'provides power to the first IGBT circuit 60', and the second power source 52 'provides power to the second IGBT circuit 62'. It is contemplated that the arrangement can be reversed. The third 63 'power source can supply power to the 56' microprocessor, LEDs, and Optos. Other arrangements are also contemplated. The first and second power sources (50 ', 52') can each provide twelve (12) volts DC power, and the third 63 'power source can provide five (5) volts DC power, although other sources of power and voltages are also contemplated, including alternating current. It is contemplated that it can be just one power source, or more than three power sources.
[00141] In FIGURE 1 C, the first diode bridge circuit U7 is configured with the first IGBT circuit 60 'which comprises the first IGBT IG1 device and the first optically isolated IGBT driver I MOSFET U9. The second diode bridge circuit U8 is configured with second circuit GBT 62 'which comprises the second device IGBT IG2 and the second optically isolated IGBT / MOSFET driver U10. Diode bridge circuits U7, U8 are used to direct the positive and negative half cycles of the current to reach a condition known as unidirectional half cycles. This enables you to use a single IGBT device IG1 and IG2 since the IGBT is a unidirectional device. MOSFET devices are also included.
[00142] Switch 58 'functions as a single displacement double pole switch (SPDT), sometimes referred to as a "pass switch". When the respective IGBT device IG1 or IG2 is in a OFF condition, state, or position, then no AC current flows through the respective diode bridge U7, U8. When the respective IGBT device IG1 or IG2 is in an ON condition, state, or position, then AC current flows through the respective diode bridge U7, U8. The microprocessor 56 'measures the AC input line voltage, as in line 100', and decides the voltage level at which the increased voltage is to be employed. Three small blocks of bridges or collectors 3x2 102 'may allow the selection of the six (6) voltages as shown in Table 1 above and in FIGURE 19C. Other predetermined voltage configurations are also contemplated. Other quantities of bridge blocks or collectors 102 'are also contemplated. The microprocessor 56 'operates and controls the IGBT switching device 58' to maintain the selected voltage.
[00143] The microprocessor 56 'can use the zero crossing point detection of the AC mains voltage. This zero crossing detection is used to ensure the correct switching timing of the IGBTs IG1 and IG2 devices. Zero crossover timing eliminates the possibility that both IG1 and IG2 devices will be connected at the same time. FIGURES 5 and 6 propose an oscillogram and circuit diagram, respectively, of a means of determining the zero volt crossing point that is contemplated. Other types of zero volt crossing point determination means are also contemplated. Hysteresis can be used to eliminate any erratic switching around the limit point determined by bridges 102 '.
[00144] In FIGURES 19 to 19C, components R30 to R47 are resistors, components C20 to C29 are capacitors, components D10 and D11 are diodes, component Z1 is a voltage suppressor, components Z2 to Z4 can be diodes (Schottky type), component Z5 is a Zener diode, components IG1 and IG2 are IGBT transistors, component TRA1 is a transformer, component U2 is a switching regulator, component U3 is an opto isolator, components U4 a U6 are linear regulators, components U7 and U8 are diode bridge circuits or bridge rectifiers, components U9 and U 10 are optically isolated IGBT / MOS-FET drivers, and component J2 is a 1 x 5 collector.
[00145] As can be understood now, all switching can be carried out with substantially less current on the primary side, such as the primary side (10A, 10B) of transformer 41 ', than on the secondary side, such as the secondary side (2A, 2B ) of the 4T transformer. Since the secondary windings are permanently connected, and the reinforcement switching is carried out on the primary side, there will be substantially no interruption of electricity during the switching period. This cannot be achieved when switching on the secondary side. Different types of electronic switches (16 ', 58') are used to short-circuit the primary transformer when it is not in use, in order to eliminate the reactive component of the current on the side of the secondary winding. The transformer is active only during the voltage boost period. The amount of reinforcement or increase can be selected for the reason of the transformer. Transformers with different ratios and / or current ratings can be removably connected to the system. The device can be used for universal operation from 120 Volts to 250 Volts AC. The size of the device can be relatively small. There may be very little heat dissipation. The device can be cost-effective and reliable. The device can be used to supply increased voltage for electrical loads, including residential, industrial or commercial.
[00146] Although two modes of switching network are shown in FIGURES 18A to 19C, other modalities are contemplated, including, but not limited to, switching performed with (1) a diode bridge in conjunction with an IGBT, (2) a diode bridge in conjunction with a power MOSFET, (3) a diode bridge in conjunction with a switch, relay, mechanical contactor or any other type of mechanical switch, (4) a diode bridge in conjunction with an SCR / Thyristor or a TRIAC, (5) TRIAC, (6) SCR / Thyristor devices arranged in an inverse parallel arrangement, or (7) a switch, relay, contactor or any other type of mechanical switch. Switches can be used to provide a first state, condition, or position to short circuit the primary windings, and a second state, condition, or position to add the secondary voltage of the transformer to the line input voltage. In all modalities, other transformer primary winding outlets are contemplated to provide different levels of reinforcement over a variety of voltage limits. The outlets can allow a number of turns of the primary winding of the transformer to be selected, providing a transformer with a variable turn ratio. For all modes, there can be multiple sockets in the primary windings selected by the microprocessor to provide different reinforcement levels at different input voltage levels. Electric Power Use Management
[00147] The device based on IGBT / FET 1 shown in FIGURES 1 to 17 and the voltage reinforcement system 30 'shown in FIGURES 18A to 19C can work together to manage the use of electrical power. During a first predetermined period of time, such as when blackouts are not anticipated, DSP 10 controls the IGBT / FET 1 based device shown in FIGURE 1 to provide a predetermined voltage that is less than the AC line voltage. Phase 2 input connections are provided for inputting analog signals to device 1. The magnetic flux concentrator 3 (or a current transformer) determines the incoming analog signal and the zero volt crossing point detector 5 determines the zero volt crossing of the signal. The positive half-cycle and negative half-cycle of the signal are identified and routed to the digital signal processor 10 to process the signal. The signal is reduced by the trigger control 15 through pulse amplitude modulation and the reduced amount of energy is supplied, thereby producing energy savings for an end user. As shown in FIGURE 1, the real-time clock module 49 is connected to DSP 10. The real-time clock module 49 can be used to configure the predetermined time periods.
[00148] The microprocessor 26 'shown in FIGURE 18C can measure the AC input line voltage, and compare it with the predetermined voltage. When the AC input line voltage is greater than the predetermined voltage, the microprocessor controls the switching network 16 'shown in FIGURE 18A on the side of the primary windings of the transformer to short-circuit the primary windings. When the measured voltage is less than the predetermined voltage, and a voltage increase is required, such as during a power failure with an excessive voltage drop condition, the microprocessor 26 'controls the switching network 16' to connect one end of the windings primary to neutral, remove the short-circuit from the transformer and allow the secondary voltage to be added to the mains input voltage to provide a reinforced output voltage across the direct output line on the side of the transformer secondary windings. The voltage can be increased to the predetermined voltage. The secondary windings are not switched.
[00149] During a second predetermined period of time, such as when blackout conditions are anticipated, DSP 10 controls the device based on IGBT / FET 1 shown in FIGURE 1 to provide an allocated amount of power, which can be predetermined. DSP 10 and / or microprocessor 26 'monitors power consumption, which can be displayed. When the power consumption exceeds the allocated amount, the DSP 10 can turn off the power
[00150] Alternatively, when the power consumed exceeds the allocated power, a signal can be sent alerting to the need to reduce the use of power. In FIGURE 20, signal module 100 is connected to DSP 10 and can provide the signal. The signal can be audible, visible, or otherwise. The signal module can be a siren module, although other modules are also contemplated. Wirelessly controlled electrical outputs can be used to selectively reduce the load in response to the signal. If the load has not been reduced properly after a predetermined amount of time, DSP 10 can turn off the power. The consumer can then reduce some load, and initiate a command to turn the power on again. The command can be initiated by changing the condition of a switch, including manually and / or wirelessly. If the load has not yet been reduced properly after the power has been restored, then the DSP can again turn off the power. Alternatively, the DSP can provide another signal that can again alert you that the load has to be reduced. If the consumed power is not sufficiently reduced after a predetermined amount of time, then the DSP can switch off the power via the direct output line for the duration of the second predetermined time period.
[00151] Additionally and alternatively, when the consumed power exceeds the allocated power, the DSP can turn off the power for predetermined electrical outputs, while supplying power for other electrical outputs, to reduce the total power usage for the amount of allocated power. The system can use wirelessly controlled electrical outputs that can be automatically turned off to meet the predetermined amount of power. The system and method can use pre-initialized consumer preferences to reduce the power consumed. The system can be monitored, operated and adjusted wirelessly.
[00152] Energy allocation, as described above, allows consumers to enjoy electrical power for key devices instead of having no power at all. There are many times when this action is necessary where there is insufficient electrical power for all consumers. Under this condition, the electric company may wish to provide reduced or allocated service to all consumers, instead of providing service to some consumers and no service to others. The consumer can be part of the solution rather than part of the problem.
[00153] Through wireless communication there is the ability to communicate between controllers, adapters, and input devices. The display device can use a shelf computer, iPad, smart phone, or other input devices using a keyboard, touchscreen or combination thereof. Other devices are also contemplated, an iPad is available from Apple Inc. of Cupertino, California. Although an input device can be used for wireless monitoring, tuning settings, or tuning control parameters, the system can operate completely autonomously, regardless of the input device. In addition, the main unit can have complete wireless communication to enable remote control of the power output and adapters mentioned above. The system can provide total control of lighting and environment. The system can allow a consumer power usage profile to be entered and implemented for power allocation and selective power reduction. The system and method can provide dynamic allocation of power.
[00154] As can be understood now, the system and method is an energy saving management system that is installed at the point of consumption. The implementation does not require any immediate increase in power generation, nor does it require any immediate improvement of the power network. The solution uses an energy management system that saves energy, reduces power failures with excessive voltage drops and blackouts, and manages usage to reduce costs for the consumer and the electricity generation and distribution company. The management system results in a reduction in copper losses, thereby releasing previously lost energy as heat and a financial loss for the electricity company. The saved energy can be supplied to additional consumers, thereby providing additional revenue to the power utility at no additional cost.
[00155] The system and method has at least eight main characteristics: (1) energy conservation and cost savings for the user, (2) voltage stabilization, (3) uniform electricity costs for consumers, (4) reduction of copper loss, (5) mitigation of hydrocarbon emissions, (6) mitigation of power failure with excessive voltage drop, (7) blackout mitigation, and (8) energy allocation.
[00156] The system and method provides energy conservation and cost savings for the user. The electrical power is typically delivered to the consumer at a nominal voltage of 120/127/230 Vrms. This is the target voltage that the electric company aims to supply. This voltage can fluctuate disadvantageously by plus or minus 10%, or more, within the power company's specification, often by a much larger margin. Appliance manufacturers, aware of power deficiencies, design their appliances to the lowest end (minus 10%) of the supply voltage and design the devices to support the largest end (plus 10%) of the supply voltage. At the lowest end, the device will perform its tasks as specified. However, at any voltage above the lowest voltage, the device will be over-powered and waste electrical energy at a cost to the consumer. The system and method minimize this situation. The invention regulates the AC voltage at the selected low voltage, thereby saving energy.
[00157] The system and method provide voltage stabilization, in extreme cases where the delivered voltage falls below the low voltage, the system and method solve this problem by reinforcing the incoming voltage, such as to allow voltage regulation to occur. Unlike the voltage intensifiers that are available for single appliances, the reinforcement section of the system keeps the voltage at the low end for all homes or businesses. Not only does this improve the quality of service for the consumer, but it also allows the removal of ugly intensifiers, used in some countries, in the vicinity of devices so equipped.
[00158] The system and method provide uniform electricity cost to consumers. In a typical community, consumers are charged inconsistently for the same amounts of electrical power required, which is the result of inconsistent voltages being supplied to the community. These losses result from losses of copper. Electrical conductors prevent the flow of electrical current. This deficiency of all conductors can be planned for, and larger copper conductors can be employed. Increasing the size of the conductor reduces copper losses. Unfortunately, the existing power distribution network in operation was not designed to transport the power needs of emerging economies where affluence is accompanied by the desire on the part of the consumer to have entertainment devices and systems to complement the style of entertainment. improved life. The result is that for a community, the power delivered to the consumer closest to the main electricity transformer has a much higher voltage than that delivered to the most distant consumer removed from the transformer. This unequal situation results in the consumer closest to the transformer paying for more energy than consumers on the other end, even if both consumers have identical appliances and a similar lifestyle. The product of electrical voltage and current is watts, and higher voltage results in greater power. Power per hour is what the consumer pays. This unequal power situation can be solved by the system and the method.
[00159] The system and method provide reduction of copper loss. Copper losses are the cumulative power distribution losses experienced across the power distribution network. In most emerging economies, the power distribution network is unable to sustain the load imposed when a community tries to consume quantities of power for which the network was not designed. This situation usually results from an increase in affluence, which is usually accompanied by the ownership of items such as air conditioners, central heating, televisions, washing machines, audio and improved lighting. When the feeder supplies power to households in this community it experiences excessive charging, the electrical resistance, present in all conductors, becomes significant, and a part of the voltage supplied appears through the conductor resistance. The product of this voltage together with the current of many consumers causes a loss of power (Watts) inside the conductor that is dissipated as heat. This represents a major loss of sales by the electric company. With the system and method installed and implemented in the households associated with this section of the network, the power that was otherwise lost can then be made available to other consumers and can result in an improved sales flow by the electricity company.
[00160] The system and method provide mitigation of the emission of hydrocarbons. Hydrocarbon emissions exist when fossil fuels (oil, gas or coal) are used to generate electrical power. The system and method manage the power that is consumed with considerable savings, at the point of consumption. The effect is twofold: first, a reduction in electricity results in a reduction in fossil fuel being consumed with the consequent savings in carbon emissions; and second, this may postpone the immediate need for additional generation capacity. Either way, the benefits are accumulated and directly affect the carbon bonding situation in a positive way.
[00161] The system and method provide mitigation of power failure with excessive voltage drop. The system and method, by its implementation alone, mitigate this problem. However, a feature is associated with the system and method where, at known times susceptible to power failure with excessive voltage drop, the device can be programmed to automatically apply an additional voltage reduction percentage. Under these circumstances, the load on the network is further reduced and results in a further reduction of copper loss.
[00162] The system and method provide blackout mitigation. Blackout hours are usually well known by the electric company. The system and method, at known times susceptible to blackout, automatically monitors the use of power, alerts the consumer, and allocates the power so that every consumer gets their rationed quantity.
[00163] In one mode, when the set time is activated and the allocated power is being exceeded, an audible alert device alerts the consumer to reduce the load. Some time later, if insufficient load has been reduced, the system can be automatically turned off. At this point the consumer can reduce some load and then change the condition of a switch to bring the system back in line. If insufficient load has been reduced, the audible alert device will again alert the consumer to reduce further load. If the consumer does not respond, the system can be determined to turn off the power for the remainder of the time. Other modalities are contemplated. Various canaries can be invoked according to the local situation, wishes, and needs of the electricity company, at their discretion. In addition, wirelessly controlled electrical outputs can be used so that the appropriate devices can be automatically turned off to meet the load reduction requirements in relation to the allocated power.
[00164] The system and method provide energy allocation. The energy allocation described above allows consumers to enjoy electrical power for key devices instead of having no power at all. There are many times when this action is necessary where there is insufficient electrical power to reach everyone. Under this scenario it is correct to provide a reduced service to everyone in an allocated amount instead of providing service to some and no service to everyone else. Each consumer is part of the solution rather than part of the problem.
[00165] It should be understood that although modalities are illustrated, they are not limited to the specific form or arrangement of parts described and shown in this document. It will be evident to those skilled in the art that various changes can be made without departing from the scope of the invention and the invention should not be considered limited to what is shown and described in the specification and drawings.

权利要求:
Claims (15)
[0001]
1. Method to manage the use of electrical power, characterized by the fact that it comprises the steps of: providing an allocated amount of power during a first predetermined period of time through a direct output line from an IGBT / FET-based device ( 1) having a digital signal processor (10); monitor the power consumed through the direct output line during the first predetermined period of time with the digital signal processor (10); in which the IGBT / FET-based device (1) comprises: at least one phase input connection ( 2) configured to input a predetermined amount of incoming energy that has at least one analog signal within the IGBT / FET-based device (1); at least one sensor connected to at least one phase input connection (2) and configured to sensing the predetermined amount of incoming energy in the device based on IGBT / FET (1); at least one zero volt crossing point detector (5) in electrical connection with at least one phase input connection (2) and configured to determine at least one zero volt crossover point of at least one analog signal; at least one half-cycle identifier (8) in electrical connection to at least one phase input connection (2) and configured for identify at least one positive half cycle of at least one analog signal and at least one negative half cycle of at least one analog signal; at least one logic device (9) in electrical connection with at least one zero crossing point detector volt (5) and at least one half-cycle identifier (8) is configured to route at least one positive half-cycle from at least one analog signal and at least one negative half-cycle from at least one analog signal to the processor digital signal processor (10); the digital signal processor (10) in electrical connection with at least one logic device (9) and configured to process at least one analog signal; at least one voltage reduction means that has at least at least one drive control (15) in which the at least one voltage reduction means is in electrical connection with at least one digital signal processor (10) and is configured to reduce the predetermined amount of energy incoming to the supplier er modulating pulse amplitude for at least one analog signal to produce a reduced amount of energy; and at least one phase output connection (17) in electrical connection with at least one voltage reduction means and configured to supply the reduced amount of energy out of the IGBT / FET based device (1); where the method still comprises the step of sending a first signal with the digital signal processor (10) when the monitored consumed power exceeds the allocated amount of power during the first predetermined period of time, the first signal alerting the need to reduce the use of power.
[0002]
2. Method according to claim 1, characterized by the fact that the at least one sensor comprises at least one among: a magnetic flux concentrator (3) and a current transformer.
[0003]
3. Method, according to claim 1, characterized by the fact that the first predetermined period of time is during predicted blackout conditions.
[0004]
4. Method according to claim 1, characterized by the fact that the first signal is an audible sound or a visible signal.
[0005]
5. Method, according to claim 1, characterized by the fact that it still comprises the step of: turning off the power on the direct output line at a predetermined time after the first signal if the monitored power exceeds the allocated amount of power over time predetermined after the first signal.
[0006]
6. Method, according to claim 5, characterized by the fact that it still comprises the step of: connecting the allocated amount of power in the direct output line after the shutdown step.
[0007]
7. Method according to claim 6, characterized by the fact that an energy consumer reduces an electrical charge and then turns on the power.
[0008]
8. Method according to claim 6, characterized by the fact that the power-up step occurs in response to a command; and where, optimally, the command is a change in the condition of a command switch.
[0009]
9. Method according to claim 1, characterized by the fact that it still comprises the steps of: receiving an incoming line voltage AC with the device based on IGBT / FET (1) for a second predetermined period of time; predetermined voltage on the direct output line of the IGBT / FET-based device (1) which is less than the incoming line voltage AC during the second predetermined period of time; and measuring the incoming line voltage AC during the second predetermined period of time.
[0010]
10. Method, according to claim 9, characterized by the fact that it still comprises the steps of: providing a transformer (41 ') with the secondary windings of the transformer (2A, 2B) between a direct input line and a direct output, and the primary windings of the transformer (10A, 10B) in electrical connection at a first end with the direct input line and at a second end with an electronic switch, receiving incoming line voltage AC at the direct input line; control the electronic switch with a microprocessor for a first condition by electrically connecting the second end of the primary windings (10A, 10B) with the direct input line when the incoming line voltage AC is greater than the predetermined voltage during the second period of time predetermined.
[0011]
11. Method according to claim 9, characterized by the fact that the predetermined voltage that is supplied on the direct output line is determined using one or more of: a percentage of voltage reduction, a percentage of reduction in savings, and a root value of the desired average square voltage of the output voltage.
[0012]
12. Method, according to claim 11, characterized by the fact that it still comprises displaying the amount of energy saved.
[0013]
13. System to manage the use of electrical power, characterized by the fact that it comprises: a device based on IGBT / FET (1) having a digital signal processor (10), device based on IGBT I FET (1) being configured to provide an allocated amount of power over a first predetermined period of time over a direct output line, the digital signal processor (10) being configured to monitor the power consumed over the direct output line during the first period of predetermined time, wherein the IGBT / FET-based device (1) comprises: at least one phase input connection (2) configured to input a predetermined amount of incoming energy that has at least one analog signal within the IGBT-based device / FET (1); at least one sensor connected to at least one phase input connection (2) and configured to sense the predetermined amount of incoming energy in the device based in IGBT / FET (1); at least one zero volt crossing point detector (5) in electrical connection with at least one phase input connection (2) and configured to determine at least one zero crossing point volt of at least one analog signal; at least one half-cycle identifier (8) in electrical connection with at least one phase input connection (2) and configured to identify at least one positive half-cycle of at least one analog signal and at least one negative half cycle of at least one analog signal; at least one logic device (9) in electrical connection with at least one zero volt crossing point detector (5) and at least one half cycle identifier (8) and configured to route at least one positive half cycle from at least one analog signal and at least one negative half cycle from at least one analog signal to the digital signal processor (10); the digital signal processor ( 10) in electrical connection with the hair at least one logic device (9) and configured to process at least one analog signal; at least one voltage reduction means that has at least one drive control (15) in which the at least one voltage reduction means lies in electrical connection with at least one digital signal processor (10) and is configured to reduce the predetermined amount of incoming energy by providing pulse amplitude modulation for at least one analog signal to produce a reduced amount of energy; and at least one phase output connection (17) in electrical connection with at least one voltage reduction means and configured to supply the reduced amount of energy out of the IGBT / FET based device (1); wherein the digital signal processor (10) is configured to send a first signal when the monitored consumed power exceeds the allocated amount of power during the first predetermined period of time, the first signal alerting to the need to reduce power usage.
[0014]
14. System according to claim 13, characterized by the fact that the first signal is an audible sound or a visible signal.
[0015]
15. System according to claim 13, characterized by the fact that the digital signal processor (10) is configured to turn off the power on the direct output line at a predetermined time after the first signal if the monitored power exceeds the amount allocated power at the predetermined time after the first signal.

类似技术:

---

公开号 | 公开日 | 专利标题

---

BR112013007674B1|2020-11-10|system and method for managing power utilization

---

US9716431B2|2017-07-25|IGBT/FET-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation

---

US20140343744A1|2014-11-20|Autonomous smart grid demand measurement system and method

---

CN100437437C|2008-11-26|Power saver controller

---

US20050099131A1|2005-05-12|Electrical power conservation apparatus and method

---

US20020070719A1|2002-06-13|Electrical power conservation apparatus and method

---

AU2018203266B2|2020-07-09|System and method to manage power usage

---

Lawan et al.2017|Automatic Load Sharing and Control System Using a Microcontroller

---

EP2366975B1|2016-10-12|Consumption meter with a power supply

---

BR132012003099E2|2015-07-21|System-based energy saving device and igbt / fet method

同族专利:

---

公开号 | 公开日

---

MX2013003610A|2014-01-31|

---

AU2011314325A1|2013-03-28|

---

MX370209B|2019-12-05|

---

BR112013007674A2|2019-09-24|

---

MX339118B|2016-05-12|

---

WO2012050635A1|2012-04-19|

---

UY33639A|2012-02-29|

---

EP2622713B1|2016-11-30|

---

CA2811711A1|2012-04-19|

---

KR20130099120A|2013-09-05|

---

KR101859498B1|2018-05-18|

---

EP2622713A1|2013-08-07|

---

US20140346896A1|2014-11-27|

---

NZ608048A|2015-08-28|

---

CN103141007A|2013-06-05|

---

UY33638A|2012-02-29|

---

EP2622713A4|2014-08-20|

---

US20110182094A1|2011-07-28|

---

EA201390451A1|2013-09-30|

---

JP2013539347A|2013-10-17|

引用文献:

---

公开号 | 申请日 | 公开日 | 申请人 | 专利标题

---

---

US2276358A|1938-10-15|1942-03-17|Vickers Inc|Power saving pump jack|

---

US2345933A|1940-01-06|1944-04-04|American Telephone & Telegraph|Phase control in electrical transmission|

---

US3440512A|1965-12-28|1969-04-22|Texaco Inc|Electric motor control system for a beam type pumping load|

---

US3953777A|1973-02-12|1976-04-27|Delta-X Corporation|Control circuit for shutting off the electrical power to a liquid well pump|

---

US3959719A|1975-04-30|1976-05-25|General Electric Corporation|Static controller for power factor correction and adaptive filtering|

---

US4145161A|1977-08-10|1979-03-20|Standard Oil Company |Speed control|

---

US4324987A|1978-05-26|1982-04-13|Cyborex Laboratories, Inc.|System and method for optimizing shed/restore operations for electrical loads|

---

US4429578A|1982-03-22|1984-02-07|General Electric Company|Acoustical defect detection system|

---

US4429269A|1982-04-12|1984-01-31|Varian Associates, Inc.|Feed forward AC voltage regulator employing step-up, step-down transformer and analog and digital control circuitry|

---

DE3218823C2|1982-04-22|1984-06-20|LGZ Landis & Gyr Zug AG, Zug|Measuring transducer arrangement with two magnetic cores|

---

JPS58223820A|1982-06-22|1983-12-26|Mitsubishi Electric Corp|Automatic voltage controller|

---

US4513361A|1983-02-15|1985-04-23|Hughes Aircraft Company|Multi-phase DC-to-AC and DC-to-DC boost converter|

---

US4513240A|1983-06-08|1985-04-23|Westinghouse Electric Corp.|Method and apparatus for selective cancellation of subsynchronous resonance|

---

US4659981A|1985-09-24|1987-04-21|Sony Corporation|Input transformer circuit|

---

JPH06106008B2|1985-12-16|1994-12-21|三菱電機株式会社|Demand control device|

---

US4819180A|1987-02-13|1989-04-04|Dencor Energy Cost Controls, Inc.|Variable-limit demand controller for metering electrical energy|

---

US5204595A|1989-01-17|1993-04-20|Magnetek, Inc.|Method and apparatus for controlling a walking beam pump|

---

AT393421B|1989-03-09|1991-10-25|Siemens Ag Oesterreich|CURRENT TRANSFORMER ARRANGEMENT FOR THREE-WIRE THREE-PHASE SYSTEMS FOR DETECTING THE CURRENT VALUE|

---

US5003192A|1989-06-23|1991-03-26|Core Industries, Inc.|AC power switching device with non-volatile memory unit|

---

US4997346A|1990-04-12|1991-03-05|Atlantic Richfield Company|Well pumping systems|

---

US5180970A|1992-02-10|1993-01-19|Honeywell Inc.|Mechanically adjustable current sensor and method for making same|

---

US5481140A|1992-03-10|1996-01-02|Mitsubishi Denki Kabushiki Kaisha|Demand control apparatus and power distribution control system|

---

US5299266A|1992-03-20|1994-03-29|Sony Electronics Inc.|Multi machine monitor for TV post production|

---

US5281100A|1992-04-13|1994-01-25|A.M.C. Technology, Inc.|Well pump control system|

---

DE69321470D1|1992-09-01|1998-11-12|Nazir Dosani|POWER CONTROL UNIT|

---

US5583423A|1993-11-22|1996-12-10|Bangerter; Fred F.|Energy saving power control method|

---

CA2115717A1|1994-02-15|1995-08-16|Nazir Dosani|Method and apparatus for remote control of an electrical load|

---

AT196052T|1994-04-29|2000-09-15|Andre Bonnet|STATIC CONVERTER WITH CONTROLLED SWITCH AND CONTROL CIRCUIT|

---

US5481225A|1994-06-03|1996-01-02|Sony Electronics Inc.|Variable gain differential amplifier circuit|

---

JP2777596B2|1994-06-09|1998-07-16|株式会社エステック|Terminal device for load controller signal output of demand controller|

---

US5506484A|1994-06-10|1996-04-09|Westinghouse Electric Corp.|Digital pulse width modulator with integrated test and control|

---

CA2127928A1|1994-07-13|1996-01-14|Gaston Lefebvre|Electrical load controller to regulate power consumption|

---

US5615097A|1994-09-20|1997-03-25|Astec International, Ltd.|Transient over voltage protection circuit for electrical power converters|

---

US5600549A|1994-09-20|1997-02-04|Astec International, Ltd.|Power factor corrected electrical power converter|

---

US5747972A|1995-01-11|1998-05-05|Microplanet Ltd.|Method and apparatus for electronic power control|

---

US5602462A|1995-02-21|1997-02-11|Best Power Technology, Incorporated|Uninterruptible power system|

---

US5614811A|1995-09-26|1997-03-25|Dyalem Concepts, Inc.|Power line control system|

---

JP3230434B2|1996-06-05|2001-11-19|富士電機株式会社|AC / DC conversion circuit|

---

US5754036A|1996-07-25|1998-05-19|Lti International, Inc.|Energy saving power control system and method|

---

JPH10234133A|1997-02-18|1998-09-02|Mitsubishi Electric Corp|Power load reduction system|

---

EP0889674B1|1997-07-04|2004-02-18|Sharp Kabushiki Kaisha|Power control unit|

---

US6184672B1|1997-08-15|2001-02-06|General Electric Company|Current sensor assembly with electrostatic shield|

---

US6069457A|1998-01-20|2000-05-30|Lumion University|Method and apparatus for controlling lights and other devices|

---

US6690704B2|2001-04-09|2004-02-10|Cymer, Inc.|Control system for a two chamber gas discharge laser|

---

US6178362B1|1998-09-24|2001-01-23|Silicon Energy Corp.|Energy management system and method|

---

US20040095237A1|1999-01-09|2004-05-20|Chen Kimball C.|Electronic message delivery system utilizable in the monitoring and control of remote equipment and method of same|

---

CA2259055A1|1999-01-14|2000-07-14|Franco Poletti|Load power reduction control and supply system|

---

JP2000224764A|1999-01-27|2000-08-11|Kawamura Electric Inc|Power consumption controller|

---

US6528957B1|1999-09-08|2003-03-04|Lutron Electronics, Co., Inc.|Power/energy management control system|

---

GB9921068D0|1999-09-08|1999-11-10|Univ Montfort|Bipolar mosfet device|

---

US6633154B1|2000-01-04|2003-10-14|William B. Duff, Jr.|Method and circuit for using polarized device in AC applications|

---

US6351400B1|2000-01-18|2002-02-26|Eviropower Corporation|Method and apparatus for a solar power conditioner|

---

US6553353B1|2000-01-28|2003-04-22|John Joseph Littlejohn|Advanced metering system enabling regulation and billing of utilities by third party interagent|

---

JP2001251790A|2000-03-01|2001-09-14|Mitsubishi Electric Corp|Indoor power monitor control system|

---

US20030090362A1|2000-04-25|2003-05-15|Hardwick Michael Dennis|Remote controller with energy saving|

---

US20040010350A1|2000-05-31|2004-01-15|Per-Anders Lof|Distributed power generation system protection scheme|

---

WO2001093400A1|2000-06-01|2001-12-06|Powertec International|Line side power and energy management system and methods|

---

US6891478B2|2000-06-09|2005-05-10|Jay Warren Gardner|Methods and apparatus for controlling electric appliances during reduced power conditions|

---

US6718213B1|2000-06-19|2004-04-06|Electric City Corporation|Variable base load energy management system and method|

---

US7336514B2|2001-08-10|2008-02-26|Micropulse Technologies|Electrical power conservation apparatus and method|

---

US6690594B2|2000-08-10|2004-02-10|Sal G. Amarillas|Electrical power conservation apparatus and method|

---

US6545481B1|2000-11-20|2003-04-08|International Business Machines Corporation|Power interruption detection|

---

US6489742B2|2000-12-26|2002-12-03|John Lumsden|Efficiency maximizing motor controller and method|

---

US7324876B2|2001-07-10|2008-01-29|Yingco Electronic Inc.|System for remotely controlling energy distribution at local sites|

---

US7188260B1|2001-08-29|2007-03-06|Cisco Technology, Inc.|Apparatus and method for centralized power management|

---

US6849834B2|2001-11-02|2005-02-01|General Electric Company|Apparatus for cycle-skipping power control|

---

US7164238B2|2001-11-14|2007-01-16|Astral Communications, Inc.|Energy savings device and method for a resistive and/or an inductive load and/or a capacitive load|

---

US6906503B2|2002-01-25|2005-06-14|Precor Incorporated|Power supply controller for exercise equipment drive motor|

---

US7049976B2|2002-04-15|2006-05-23|Hunt Power, L.P.|User-installable power consumption monitoring system|

---

JP2003333750A|2002-05-16|2003-11-21|Nichiei Intec Co Ltd|Power-saving controller for power distribution facility|

---

US20040062658A1|2002-09-27|2004-04-01|Beck Thomas L.|Control system for progressing cavity pumps|

---

MY134537A|2002-10-16|2007-12-31|Thomson Licensing Sa|Capacitively coupled power supply|

---

JP3774208B2|2003-05-16|2006-05-10|株式会社エヌ・ティ・ティ・データ・イー・エックス・テクノ|AC voltage controller|

---

US7010363B2|2003-06-13|2006-03-07|Battelle Memorial Institute|Electrical appliance energy consumption control methods and electrical energy consumption systems|

---

US20050068013A1|2003-09-30|2005-03-31|Scoggins Robert L.|Apparatus and methods for power regulation of electrical loads to provide reduction in power consumption with reversing contactors|

---

WO2005033717A1|2003-10-01|2005-04-14|Eaton Corporation|Magnetic flux concentrator current sensing topology|

---

US7019995B2|2003-11-15|2006-03-28|Hewlett-Packard Development Company, L.P.|Power supply having reduced-power mode|

---

DE60332368D1|2003-11-28|2010-06-10|St Microelectronics Srl|Control circuit for an electronic driver device for inductive loads, in particular for a device whose input signal in a high logic state has a non-optimal voltage value|

---

US7019498B2|2004-02-24|2006-03-28|William Pippin|Power factor correction circuit|

---

JP4117267B2|2004-04-28|2008-07-16|三菱電機株式会社|Demand monitoring and control device|

---

US7355865B2|2004-08-13|2008-04-08|Rockwell Automation Technologies, Inc.|Method and apparatus for rejecting the second harmonic current in an active converter with an unbalanced AC line voltage source|

---

JP2006060887A|2004-08-18|2006-03-02|Chugoku Electric Power Co Inc:The|Load interruption controlled power supply device against power failure|

---

US20060049694A1|2004-09-03|2006-03-09|Lawrence Kates|Method and apparatus for load management in an electric power system|

---

US20080049452A1|2004-10-28|2008-02-28|Koninklijke Philips Electronics, N.V.|Ultralow Power stan-By Supply|

---

TWI258265B|2004-11-05|2006-07-11|Delta Electronics Inc|DC-AC conveter|

---

US20060098369A1|2004-11-08|2006-05-11|Wambsganss Peter M|Microcontroller controlled power supply|

---

US20060103365A1|2004-11-17|2006-05-18|Compulite Systems Ltd.|Method and converter circuitry for improved-performance AC chopper|

---

US7231281B2|2004-12-14|2007-06-12|Costa Enterprises, L.L.C.|Dynamic control system for power sub-network|

---

US7349765B2|2005-02-18|2008-03-25|General Motors Corporation|System and method for managing utility consumption|

---

US8183995B2|2005-03-08|2012-05-22|Jackson Kit Wang|Systems and methods for modifying power usage|

---

US7049758B2|2005-04-01|2006-05-23|Osram Sylvania Inc.|Method of soft-starting a switching power supply having time-based pulse triggering control|

---

US7358724B2|2005-05-16|2008-04-15|Allegro Microsystems, Inc.|Integrated magnetic flux concentrator|

---

GB0511361D0|2005-06-03|2005-07-13|Responsiveload Ltd|Grid responsive control device|

---

US7378821B2|2005-08-01|2008-05-27|Enviro World Technologies, Inc|Method and apparatus using VAR measurements to control power input to a three-phase induction motor circuit|

---

US7336463B2|2005-09-09|2008-02-26|Control4 Corporation|Device and method for dimming service loads|

---

US20070071047A1|2005-09-29|2007-03-29|Cymer, Inc.|6K pulse repetition rate and above gas discharge laser system solid state pulse power system improvements|

---

US7667411B2|2005-11-24|2010-02-23|Samsung Electro-Mechanics Co., Ltd.|Backlight assembly having voltage boosting section with electrically isolated primary side and secondary side|

---

RU2431172C2|2005-11-25|2011-10-10|Кемпьютерайзд Электрисити Системз Лтд.|Flexible electric load control system and its operating method|

---

US8373547B2|2006-05-25|2013-02-12|Nev Electronics Llc|Method and apparatus for using power-line phase-cut signaling to change energy usage|

---

JP4606389B2|2006-06-28|2011-01-05|大阪瓦斯株式会社|Distributed generator control system|

---

JP2008048483A|2006-08-11|2008-02-28|Toyota Industries Corp|Dc-ac converter|

---

US7525296B2|2006-08-18|2009-04-28|Bayview Ventures, Inc.|Spread spectrum power converter with duty-cycle error compensation|

---

CN100564876C|2006-10-24|2009-12-02|株式会社安川电机|The pump depletion controlling method of pumping unit and pumping unit control gear|

---

US7882383B2|2006-11-01|2011-02-01|Freescale Semiconductor, Inc.|System on a chip with RTC power supply|

---

US20120095610A1|2007-03-14|2012-04-19|Zonit Structured Solutions, Llc.|Smart nema outlets and associated networks|

---

US8085009B2|2007-08-13|2011-12-27|The Powerwise Group, Inc.|IGBT/FET-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation|

---

US7693670B2|2007-08-14|2010-04-06|General Electric Company|Cognitive electric power meter|

---

US8085010B2|2007-08-24|2011-12-27|The Powerwise Group, Inc.|TRIAC/SCR-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation|

---

US8120307B2|2007-08-24|2012-02-21|The Powerwise Group, Inc.|System and method for providing constant loading in AC power applications|

---

US20090063228A1|2007-08-28|2009-03-05|Forbes Jr Joseph W|Method and apparatus for providing a virtual electric utility|

---

US7715951B2|2007-08-28|2010-05-11|Consert, Inc.|System and method for managing consumption of power supplied by an electric utility|

---

US8810190B2|2007-09-14|2014-08-19|The Powerwise Group, Inc.|Motor controller system and method for maximizing energy savings|

---

US8140279B2|2007-09-24|2012-03-20|Budderfly Ventures, Llc|Computer based energy management|

---

US20090085545A1|2007-09-27|2009-04-02|Nanoamp Solutions, Inc. |Voltage regulator|

---

WO2009046132A1|2007-10-01|2009-04-09|Gridpoint, Inc.|Modular electrical grid interface device|

---

US20090094173A1|2007-10-05|2009-04-09|Adaptive Logic Control, Llc|Intelligent Power Unit, and Applications Thereof|

---

US8121742B2|2007-11-08|2012-02-21|Flohr Daniel P|Methods, circuits, and computer program products for generation following load management|

---

US20100001704A1|2008-07-07|2010-01-07|Advanced Analogic Technologies, Inc.|Programmable Step-Down Switching Voltage Regulators with Adaptive Power MOSFETs|

---

US20100054001A1|2008-08-26|2010-03-04|Kenneth Dyer|AC/DC Converter with Power Factor Correction|

---

JP5163499B2|2009-01-07|2013-03-13|パナソニック株式会社|Power control system|

---

US8103388B2|2009-01-29|2012-01-24|International Business Machines Corporation|System for prediction and communication of environmentally induced power useage limitation|

---

JP2010211419A|2009-03-09|2010-09-24|Cosmo Life Kk|Electric power consumption monitoring system|

---

US20100328023A1|2009-06-25|2010-12-30|Thomson Matthew B|Method and apparatus for monitoring and selectively controlling a load in a power system|US8085009B2|2007-08-13|2011-12-27|The Powerwise Group, Inc.|IGBT/FET-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation|

---

US8085010B2|2007-08-24|2011-12-27|The Powerwise Group, Inc.|TRIAC/SCR-based energy savings device for reducing a predetermined amount of voltage using pulse width modulation|

---

US8120307B2|2007-08-24|2012-02-21|The Powerwise Group, Inc.|System and method for providing constant loading in AC power applications|

---

US8698446B2|2009-09-08|2014-04-15|The Powerwise Group, Inc.|Method to save energy for devices with rotating or reciprocating masses|

---

US8810190B2|2007-09-14|2014-08-19|The Powerwise Group, Inc.|Motor controller system and method for maximizing energy savings|

---

US8823314B2|2007-09-14|2014-09-02|The Powerwise Group, Inc.|Energy saving system and method for devices with rotating or reciprocating masses|

---

US8698447B2|2007-09-14|2014-04-15|The Powerwise Group, Inc.|Energy saving system and method for devices with rotating or reciprocating masses|

---

CN101728140B|2008-10-27|2012-04-18|国网电力科学研究院|High voltage or ultra-high voltage high-current circuit breaker|

---

US8619443B2|2010-09-29|2013-12-31|The Powerwise Group, Inc.|System and method to boost voltage|

---

KR20140043435A|2011-07-13|2014-04-09|싱귤러스 테크놀러지스 악티엔게젤샤프트|Method for operating several loads in alternating current networks with leading edge or trailing edge phase cutting|

---

US8872389B2|2011-08-09|2014-10-28|Creston Electronics Inc.|Intelligent backup power system|

---

US9065330B1|2011-11-15|2015-06-23|Marvell International Ltd.|Method and apparatus for controlling TRIAC dimmable device|

---

US9570908B2|2012-02-09|2017-02-14|Silicon Laboratories Inc.|Power management system|

---

US9608507B2|2013-06-14|2017-03-28|Sinope Technologies Inc.|Low power and low EMI power stealing circuit for a control device|

---

CN103424606B|2013-07-26|2016-01-13|珠海钱龙载波系统有限公司|A kind of low voltage electric power carrier communication zero cross detection circuit of frequency self-adaption|

---

US20150309107A1|2014-04-24|2015-10-29|Automatic Switch Company|Method and system for detecting health of windings for electromagnetic devices|

---

CN103928908A|2014-04-24|2014-07-16|重庆文理学院|Current voltage regulator for alternating-current generator|

---

US9419552B2|2014-06-11|2016-08-16|Nidec Motor Corporation|Motor interface controller having an integrated power supply|

---

JP6561562B2|2014-06-30|2019-08-21|パナソニック インテレクチュアル プロパティ コーポレーション オブ アメリカＰａｎａｓｏｎｉｃ Ｉｎｔｅｌｌｅｃｔｕａｌ Ｐｒｏｐｅｒｔｙ Ｃｏｒｐｏｒａｔｉｏｎ ｏｆ Ａｍｅｒｉｃａ|Cooking apparatus, information display apparatus, control method, cooking utensil, and computer program|

---

NL2013296B1|2014-08-01|2016-09-21|Citytec B V|System for distributing electrical energy.|

---

JP2016092629A|2014-11-06|2016-05-23|アズビル株式会社|Communication state display method and communication state display device|

---

US10320313B2|2015-03-10|2019-06-11|Young Jun Kim|Arc free phase control alternatives for AC motor starters|

---

KR101629847B1|2015-05-26|2016-06-14|제이와이이엔씨|Inverter monitoring system|

---

WO2016195606A1|2015-06-03|2016-12-08|Topçu Süleyman|Parallel and redundant voltage regulator system|

---

KR102021864B1|2015-07-16|2019-09-17|엘에스산전 주식회사|Driving circuit of switching device for electric power control|

---

US10693452B2|2018-08-13|2020-06-23|Sensata Technologies, Inc.|Ultra low emission solid state relay|

---

CN109217309A|2018-10-24|2019-01-15|湖南众从视频加信息科技有限公司|A kind of user's electric quantity monitoring and close system|

法律状态:
2019-10-01| B08F| Application fees: application dismissed [chapter 8.6 patent gazette]|

---

2020-01-14| B08G| Application fees: restoration [chapter 8.7 patent gazette]|

---

2020-01-21| B06F| Objections, documents and/or translations needed after an examination request according [chapter 6.6 patent gazette]|

---

2020-01-28| B06U| Preliminary requirement: requests with searches performed by other patent offices: procedure suspended [chapter 6.21 patent gazette]|

---

2020-05-26| B09A| Decision: intention to grant [chapter 9.1 patent gazette]|

---

2020-11-10| B16A| Patent or certificate of addition of invention granted|Free format text: PRAZO DE VALIDADE: 20 (VINTE) ANOS CONTADOS A PARTIR DE 18/04/2011, OBSERVADAS AS CONDICOES LEGAIS. |

---

2021-04-06| B21F| Lapse acc. art. 78, item iv - on non-payment of the annual fees in time|Free format text: REFERENTE A 10A ANUIDADE. |

---

2021-08-10| B24J| Lapse because of non-payment of annual fees (definitively: art 78 iv lpi, resolution 113/2013 art. 12)|Free format text: EM VIRTUDE DA EXTINCAO PUBLICADA NA RPI 2622 DE 06-04-2021 E CONSIDERANDO AUSENCIA DE MANIFESTACAO DENTRO DOS PRAZOS LEGAIS, INFORMO QUE CABE SER MANTIDA A EXTINCAO DA PATENTE E SEUS CERTIFICADOS, CONFORME O DISPOSTO NO ARTIGO 12, DA RESOLUCAO 113/2013. |

优先权:

---

申请号 | 申请日 | 专利标题

---

USPCT/US2010/050714|2010-09-29|

---

PCT/US2010/050714|WO2012044289A1|2010-09-29|2010-09-29|System and method to boost voltage|

---

US12/893,539|US8619443B2|2010-09-29|2010-09-29|System and method to boost voltage|

---

US12/893,539|2010-09-29|

---

US201161432399P| true| 2011-01-13|2011-01-13|

---

US61/432,399|2011-01-13|

---

US13/026,931|US20110182094A1|2007-08-13|2011-02-14|System and method to manage power usage|

---

US13/026,931|2011-02-14|

---

PCT/US2011/032840|WO2012050635A1|2010-09-29|2011-04-18|System and method to manage power usage|

---